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| author | Teresa Gámez <t.gamez@phytec.de> | 2012-10-09 11:53:25 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-10-09 20:36:21 +0200 |
| commit | f4226a9ed40cdf27b6dd1439f5a17586b4331d6c (patch) | |
| tree | 309dd08a4d706de523a9d093920bd906bc6c9b48 | |
| parent | 6bb2ad1323bdaccf7128d0db11ad6015c07ac837 (diff) | |
| download | barebox-f4226a9ed40cdf27b6dd1439f5a17586b4331d6c.tar.gz barebox-f4226a9ed40cdf27b6dd1439f5a17586b4331d6c.tar.xz | |
ARM OMAP: Remove usage of gpio lib calls in lowlevel code
As the gpio functions are not available at this point, set the gpio manually.
Signed-off-by: Teresa Gámez <t.gamez@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | arch/arm/mach-omap/omap4_generic.c | 29 |
1 files changed, 27 insertions, 2 deletions
diff --git a/arch/arm/mach-omap/omap4_generic.c b/arch/arm/mach-omap/omap4_generic.c index a159dfcb7e..81b39f9d0d 100644 --- a/arch/arm/mach-omap/omap4_generic.c +++ b/arch/arm/mach-omap/omap4_generic.c @@ -484,11 +484,27 @@ enum omap_boot_src omap4_bootsrc(void) return OMAP_BOOTSRC_UNKNOWN; } +#define GPIO_MASK 0x1f + +static void __iomem *omap4_get_gpio_base(unsigned gpio) +{ + void __iomem *base; + + if (gpio < 32) + base = (void *)0x4a310000; + else + base = (void *)(0x48053000 + ((gpio & ~GPIO_MASK) << 8)); + + return base; +} + #define I2C_SLAVE 0x12 noinline int omap4_scale_vcores(unsigned vsel0_pin) { + void __iomem *base; unsigned int rev = omap4_revision(); + u32 val = 0; /* For VC bypass only VCOREx_CGF_FORCE is necessary and * VCOREx_CFG_VOLTAGE changes can be discarded @@ -510,8 +526,17 @@ noinline int omap4_scale_vcores(unsigned vsel0_pin) * VSEL1 is grounded on board. So the following selects * VSEL1 = 0 and VSEL0 = 1 */ - gpio_direction_output(vsel0_pin, 0); - gpio_set_value(vsel0_pin, 1); + base = omap4_get_gpio_base(vsel0_pin); + + val = 1 << (vsel0_pin & GPIO_MASK); + writel(val, base + 0x190); + + val = readl(base + 0x134); + val &= (1 << (vsel0_pin & GPIO_MASK)); + writel(val, base + 0x134); + + val = 1 << (vsel0_pin & GPIO_MASK); + writel(val, base + 0x194); } /* set VCORE1 force VSEL */ |