diff options
| author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2015-11-20 20:36:08 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2015-11-23 08:17:24 +0100 |
| commit | f7d39e122e5dc6c119f0f9576f96ff546ac5aa6c (patch) | |
| tree | 1cabab26b33c405113d106906cfb9f4a6855bb6b | |
| parent | 624bea7b14629862bbf6b93592d84e06268fa055 (diff) | |
| download | barebox-f7d39e122e5dc6c119f0f9576f96ff546ac5aa6c.tar.gz barebox-f7d39e122e5dc6c119f0f9576f96ff546ac5aa6c.tar.xz | |
mtd: nand_mrvl_nfc: Add support for 8bit BCH HW ECC
Add support for 8bit HW ECC modes supported by later IP versions.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Robert Jarzmik <robert.jarzmik@free.fr>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
| -rw-r--r-- | drivers/mtd/nand/nand_mrvl_nfc.c | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/drivers/mtd/nand/nand_mrvl_nfc.c b/drivers/mtd/nand/nand_mrvl_nfc.c index fc1cfa0ea0..b1ebecb3b5 100644 --- a/drivers/mtd/nand/nand_mrvl_nfc.c +++ b/drivers/mtd/nand/nand_mrvl_nfc.c @@ -252,6 +252,17 @@ static struct nand_ecclayout ecc_layout_4KB_bch4bit = { .oobfree = { {1, 4}, {6, 26}, {64, 32} } }; +static struct nand_ecclayout ecc_layout_4KB_bch8bit = { + .eccbytes = 64, + .eccpos = { + 32, 33, 34, 35, 36, 37, 38, 39, + 40, 41, 42, 43, 44, 45, 46, 47, + 48, 49, 50, 51, 52, 53, 54, 55, + 56, 57, 58, 59, 60, 61, 62, 63}, + /* Bootrom looks in bytes 0 & 5 for bad blocks */ + .oobfree = { {1, 4}, {6, 26} } +}; + #define NDTR0_tCH(c) (min((c), 7) << 19) #define NDTR0_tCS(c) (min((c), 7) << 16) #define NDTR0_tWH(c) (min((c), 7) << 11) @@ -928,6 +939,31 @@ static int pxa_ecc_strength4(struct mrvl_nand_host *host, return -ENODEV; } +static int pxa_ecc_strength8(struct mrvl_nand_host *host, + struct nand_ecc_ctrl *ecc, int ecc_stepsize, int page_size) +{ + if (!(host->hwflags & HWFLAGS_ECC_BCH)) + return -ENODEV; + + /* + * Required ECC: 8-bit correction per 512 bytes + * Select: 16-bit correction per 1024 bytes + */ + if (ecc_stepsize == 512 && page_size == 4096) { + host->chunk_size = 1024; + host->spare_size = 0; + host->ecc_size = 32; + host->ecc_bch = 1; + ecc->mode = NAND_ECC_HW; + ecc->size = 1024; + ecc->layout = &ecc_layout_4KB_bch8bit; + ecc->strength = 16; + return 0; + } + + return -ENODEV; +} + static int pxa_ecc_init(struct mrvl_nand_host *host, struct nand_ecc_ctrl *ecc, int strength, int ecc_stepsize, int page_size) @@ -941,6 +977,9 @@ static int pxa_ecc_init(struct mrvl_nand_host *host, case 4: ret = pxa_ecc_strength4(host, ecc, ecc_stepsize, page_size); break; + case 8: + ret = pxa_ecc_strength8(host, ecc, ecc_stepsize, page_size); + break; default: ret = -ENODEV; break; |