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| author | Roland Hieber <rohieb@rohieb.name> | 2018-06-12 00:02:27 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-13 09:15:53 +0200 |
| commit | 44be94a03a402d19ab044f39e1f829186a42b8e5 (patch) | |
| tree | f614645d9f0335f6425f02946086f2373a1c0ea4 /Documentation/boards/imx/element14-warp7.rst | |
| parent | 8e336580a1e1f8786162bcfa56c2c9dcc99b8f4f (diff) | |
| download | barebox-44be94a03a402d19ab044f39e1f829186a42b8e5.tar.gz barebox-44be94a03a402d19ab044f39e1f829186a42b8e5.tar.xz | |
doc: boards: imx: order table of contents alphabetically
Upper and lower case are significant when sorting file names. Stay with
lower case file names for now, and make sure the file name order is the
same as the order of the page titles in the table of contents.
Signed-off-by: Roland Hieber <rohieb@rohieb.name>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'Documentation/boards/imx/element14-warp7.rst')
| -rw-r--r-- | Documentation/boards/imx/element14-warp7.rst | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/Documentation/boards/imx/element14-warp7.rst b/Documentation/boards/imx/element14-warp7.rst new file mode 100644 index 0000000000..df14f84dc4 --- /dev/null +++ b/Documentation/boards/imx/element14-warp7.rst @@ -0,0 +1,54 @@ +element14 WaRP7 +=============== + +This CPU card is based on an NXP i.MX7S SoC. + +Supported hardware +================== + +- NXP PMIC PFUZE3000 +- Kingston 08EMCP04-EL3AV100 eMCP (eMMC and LPDDR3 memory in one package) + - 8 GiB eMMC Triple-Level cell NAND flash, eMMC standard 5.0 (HS400) + - 512 MiB LPDDR3 SDRAM starting at address 0x80000000 + +Bootstrapping barebox +===================== + +The device boots in internal boot mode from eMMC and is shipped with a +vendor modified u-boot imximage. + +Barebox can be used as a drop-in replacement for the shipped bootloader. + +The WaRP7 IO Board has a double DIP switch where switch number two defines the +boot source of the i.MX7 SoC:: + + +-----+ + | | + | | O | <--- on = high level + | | | | + | O | | <--- off = low level + | | + | 1 2 | + +-----+ + +Bootsource is the internal eMMC:: + + +-----+ + | | + | O | | + | | | | + | | O | <---- eMMC + | | + | 1 2 | + +-----+ + +Bootsource is the USB:: + + +-----+ + | | + | O O | <---- USB + | | | | + | | | | + | | + | 1 2 | + +-----+ |