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authorSascha Hauer <s.hauer@pengutronix.de>2021-03-23 12:15:22 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2021-03-23 12:15:22 +0100
commitbb2873db3ef11e7b1299b1cca129f5d002e47f59 (patch)
treee53a1697f6ffb81d8f866ddadf3862ab0c04ceef /Documentation
parent31343957ea42a9340345c17288e56cfa07304bb8 (diff)
parent176bd2605edfd7d64370736abe8c44833068788b (diff)
downloadbarebox-bb2873db3ef11e7b1299b1cca129f5d002e47f59.tar.gz
barebox-bb2873db3ef11e7b1299b1cca129f5d002e47f59.tar.xz
Merge branch 'for-next/misc'
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/boards/stm32mp.rst35
1 files changed, 33 insertions, 2 deletions
diff --git a/Documentation/boards/stm32mp.rst b/Documentation/boards/stm32mp.rst
index 87fff7d125..24b7a19ceb 100644
--- a/Documentation/boards/stm32mp.rst
+++ b/Documentation/boards/stm32mp.rst
@@ -32,6 +32,7 @@ The resulting images will be placed under ``images/``:
barebox-stm32mp15xx-dkx.img # both DK1 and DK2
barebox-stm32mp157c-lxa-mc1.img
barebox-stm32mp157c-seeed-odyssey.img
+ barebox-stm32mp15x-ev1.img # stm32mp157c-ev1 and friends
Flashing barebox
@@ -94,8 +95,38 @@ acknowledge.
Boot source selection
---------------------
-The STM32MP BootROM samples three boot pins at reset. Usually BOOT1 is
-pulled down and BOOT0 and BOOT2 are connected to a 2P DIP switch::
+The STM32MP BootROM samples three boot pins at reset. On official
+eval kit, they are either connected to a 3P DIP switch or 2P (with
+BOOT1 pulled down).
+
+EV-1
+^^^^
+SW1 on the DK boards sets boot mode as follows::
+
+ +-------+
+ | --- |
+ BOOT2 | O-- |
+ BOOT1 | O --O |
+ BOOT0 | N O-- | <---- SD-Card
+ +-------+
+
+ +-------+
+ | --- |
+ BOOT2 | --O |
+ BOOT1 | O O-- |
+ BOOT0 | N --O | <---- eMMC
+ +-------+
+
+ +-------+
+ | --- |
+ BOOT2 | --O |
+ BOOT1 | O --O |
+ BOOT0 | N --O | <---- DFU on UART and USB OTG
+ +-------+
+
+DK-1/DK-2
+^^^^^^^^^
+Boot mode on the DK board is set as follows::
+-------+
BOOT2 | O O-- |