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author | Marc Kleine-Budde <mkl@pengutronix.de> | 2009-12-07 12:40:11 +0100 |
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committer | Marc Kleine-Budde <mkl@pengutronix.de> | 2009-12-10 12:37:37 +0100 |
commit | 5390e4975018b82605783655f2e762e776bd9c6b (patch) | |
tree | 2bb57165b35f1e99788af3a82c56cbe6b6b5a5de /MAINTAINERS | |
parent | ea94a18f4bd6dd7a87ce7a29b946e5887e8871fc (diff) | |
download | barebox-5390e4975018b82605783655f2e762e776bd9c6b.tar.gz barebox-5390e4975018b82605783655f2e762e776bd9c6b.tar.xz |
start-arm: disable I-cache
<HACK>
For some yet unknown reason the processor on the i.MX35 3stack board (at
least on our board) has problem with an activated instruction cache and
booting from NAND: The copy-from-NFC-RAM-to-SDRAM routine doesn't loop.
It looks basically like this:
1:
ldmia
stmia
cmp
ble 1b
If the "cmp" instruction lives on address 0xbb000640 it doesn't work
with an activated i-cache. The processor flags are not properly updated.
So the ble won't jump back. This obviously break booting from nand.
This is why this patch disables the i-cache.
</HACK>
Signed-off-by: Marc Kleine-Budde <mkl@pengutronix.de>
Diffstat (limited to 'MAINTAINERS')
0 files changed, 0 insertions, 0 deletions