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authorAlexey Galakhov <agalakhov@gmail.com>2012-05-18 15:43:25 +0600
committerSascha Hauer <s.hauer@pengutronix.de>2012-05-21 21:58:26 +0200
commit5ef3ecd922e459b50b7a2e4c61d8b876ee1c146a (patch)
treed45cf896f90cd1e257d05ccca0aa54e5079eb0cf /arch/arm/boards/a9m2410
parentfd0e39fe55393565d5493e2e111a60470d750a68 (diff)
downloadbarebox-5ef3ecd922e459b50b7a2e4c61d8b876ee1c146a.tar.gz
barebox-5ef3ecd922e459b50b7a2e4c61d8b876ee1c146a.tar.xz
Make S3C24xx config options available for all S3Cs
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/a9m2410')
-rw-r--r--arch/arm/boards/a9m2410/a9m2410.c2
-rw-r--r--arch/arm/boards/a9m2410/config.h2
-rw-r--r--arch/arm/boards/a9m2410/lowlevel_init.S2
3 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c
index 7c51d584a6..eaafdbdd71 100644
--- a/arch/arm/boards/a9m2410/a9m2410.c
+++ b/arch/arm/boards/a9m2410/a9m2410.c
@@ -136,7 +136,7 @@ static int a9m2410_devices_init(void)
device_initcall(a9m2410_devices_init);
-#ifdef CONFIG_S3C24XX_NAND_BOOT
+#ifdef CONFIG_S3C_NAND_BOOT
void __bare_init nand_boot(void)
{
s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0);
diff --git a/arch/arm/boards/a9m2410/config.h b/arch/arm/boards/a9m2410/config.h
index 87b05fc55d..4b8a9a296a 100644
--- a/arch/arm/boards/a9m2410/config.h
+++ b/arch/arm/boards/a9m2410/config.h
@@ -115,7 +115,7 @@
#define A9M2410_TWRPH1 1
/* needed in the generic NAND boot code only */
-#ifdef CONFIG_S3C24XX_NAND_BOOT
+#ifdef CONFIG_S3C_NAND_BOOT
# define BOARD_DEFAULT_NAND_TIMING CALC_NFCONF_TIMING(A9M2410_TACLS, A9M2410_TWRPH0, A9M2410_TWRPH1)
#endif
diff --git a/arch/arm/boards/a9m2410/lowlevel_init.S b/arch/arm/boards/a9m2410/lowlevel_init.S
index a106d53a1d..0463b260be 100644
--- a/arch/arm/boards/a9m2410/lowlevel_init.S
+++ b/arch/arm/boards/a9m2410/lowlevel_init.S
@@ -28,7 +28,7 @@ board_init_lowlevel:
bl s3c24x0_sdram_init
-#ifdef CONFIG_S3C24XX_NAND_BOOT
+#ifdef CONFIG_S3C_NAND_BOOT
mov lr, r10 /* restore the link register */
/* up to here we are running from the internal SRAM area */
b s3c24x0_nand_boot /* does return directly to our caller into SDRAM */