ARM: remove samsung arch

arch/arm/mach-samsung/ hasn't seen any active maintenance or interest
for a long time. Remove the architecture, boards and defconfig files

Reviewed-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.barebox.org/20230228135727.1602351-2-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

10 files changed, 0 insertions, 442 deletions

diff --git a/arch/arm/boards/a9m2410/Makefile b/arch/arm/boards/a9m2410/Makefile
deleted file mode 100644
index 6c53eafae2..0000000000
--- a/arch/arm/boards/a9m2410/Makefile
+++ /dev/null
@@ -1,4 +0,0 @@
-# SPDX-License-Identifier: GPL-2.0-only
-
-lwl-y += lowlevel_init.o
-obj-y += a9m2410.o
diff --git a/arch/arm/boards/a9m2410/a9m2410.c b/arch/arm/boards/a9m2410/a9m2410.c
deleted file mode 100644
index 25022abde2..0000000000
--- a/arch/arm/boards/a9m2410/a9m2410.c
+++ /dev/null
@@ -1,136 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-// SPDX-FileCopyrightText: 2009 Juergen Beisert, Pengutronix
-
-#include <common.h>
-#include <driver.h>
-#include <init.h>
-#include <asm/armlinux.h>
-#include <generated/mach-types.h>
-#include <asm/sections.h>
-#include <nand.h>
-#include <io.h>
-#include <mach/devices-s3c24xx.h>
-#include <mach/s3c-iomap.h>
-#include <mach/s3c24xx-nand.h>
-#include <mach/s3c-generic.h>
-#include <mach/s3c-busctl.h>
-#include <mach/s3c24xx-gpio.h>
-
-// {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
-static struct s3c24x0_nand_platform_data nand_info = {
-	.nand_timing = CALC_NFCONF_TIMING(A9M2410_TACLS, A9M2410_TWRPH0, A9M2410_TWRPH1)
-};
-
-static int a9m2410_mem_init(void)
-{
-	resource_size_t size;
-
-	/*
-	 * Note: On this card the second SDRAM page is not used
-	 */
-	s3c24xx_disable_second_sdram_bank();
-	size = s3c24xx_get_memory_size();
-
-	/* ---------- configure the GPIOs ------------- */
-	writel(0x007FFFFF, S3C_GPACON);
-	writel(0x00000000, S3C_GPCCON);
-	writel(0x00000000, S3C_GPCUP);
-	writel(0x00000000, S3C_GPDCON);
-	writel(0x00000000, S3C_GPDUP);
-	writel(0xAAAAAAAA, S3C_GPECON);
-	writel(0x0000E03F, S3C_GPEUP);
-	writel(0x00000000, S3C_GPBCON);	/* all inputs */
-	writel(0x00000007, S3C_GPBUP);	/* pullup disabled for GPB0..3 */
-	writel(0x00009000, S3C_GPFCON);	/* GPF7 CLK_INT#, GPF6 Debug-LED */
-	writel(0x000000FF, S3C_GPFUP);
-	writel(readl(S3C_GPGDAT) | 0x0010, S3C_GPGDAT);	/* switch off LCD backlight */
-	writel(0xFF00A938, S3C_GPGCON);	/* switch off USB device */
-	writel(0x0000F000, S3C_GPGUP);
-	writel(readl(S3C_GPHDAT) | 0x100, S3C_GPHDAT);	/* switch BOOTINT/GPIO_ON# to high */
-	writel(0x000007FF, S3C_GPHUP);
-	writel(0x0029FAAA, S3C_GPHCON);
-	/*
-	 * USB port1 normal, USB port0 normal, USB1 pads for device
-	 * PCLK output on CLKOUT0, UPLL CLK output on CLKOUT1,
-	 * 2nd SDRAM bank off (only bank 1 is used)
-	 */
-	writel(0x40140, S3C_MISCCR);
-
-	arm_add_mem_device("ram0", S3C_SDRAM_BASE, size);
-
-	return 0;
-}
-mem_initcall(a9m2410_mem_init);
-
-static const struct devfs_partition a9m2410_nand0_partitions[] = {
-	{
-		.offset = 0,
-		.size = 0x40000,
-		.flags = DEVFS_PARTITION_FIXED,
-		.name = "self_raw",
-		.bbname = "self0",
-	}, {
-		.offset = DEVFS_PARTITION_APPEND,
-		.size = 0x20000,
-		.flags = DEVFS_PARTITION_FIXED,
-		.name = "env_raw",
-		.bbname = "env0",
-	}, {
-		/* sentinel */
-	}
-};
-
-static int a9m2410_devices_init(void)
-{
-	uint32_t reg;
-
-	/* ----------- configure the access to the outer space ---------- */
-	reg = readl(S3C_BWSCON);
-
-	/* CS#1 to access the network controller */
-	reg &= ~0xf0;
-	reg |= 0xe0;
-	writel(0x1350, S3C_BANKCON1);
-
-	/* CS#2 to the dual 16550 UART */
-	reg &= ~0xf00;
-	reg |= 0x400;
-	writel(0x0d50, S3C_BANKCON2);
-
-	writel(reg, S3C_BWSCON);
-
-	/* release the reset signal to the network and UART device */
-	reg = readl(S3C_MISCCR);
-	reg |= 0x10000;
-	writel(reg, S3C_MISCCR);
-
-	/* ----------- the devices the boot loader should work with -------- */
-	s3c24xx_add_nand(&nand_info);
-	/*
-	 * SMSC 91C111 network controller on the baseboard
-	 * connected to CS line 1 and interrupt line
-	 * GPIO3, data width is 32 bit
-	 */
-	add_generic_device("smc91c111", DEVICE_ID_DYNAMIC, NULL, S3C_CS1_BASE + 0x300,
-			16, IORESOURCE_MEM, NULL);
-
-	if (IS_ENABLED(CONFIG_NAND))
-		devfs_create_partitions("nand0", a9m2410_nand0_partitions);
-
-	armlinux_set_architecture(MACH_TYPE_A9M2410);
-
-	return 0;
-}
-
-device_initcall(a9m2410_devices_init);
-
-static int a9m2410_console_init(void)
-{
-	barebox_set_model("Digi A9M2410");
-	barebox_set_hostname("a9m2410");
-
-	s3c24xx_add_uart1();
-	return 0;
-}
-
-console_initcall(a9m2410_console_init);
diff --git a/arch/arm/boards/a9m2410/config.h b/arch/arm/boards/a9m2410/config.h
deleted file mode 100644
index dbe4bb32cb..0000000000
--- a/arch/arm/boards/a9m2410/config.h
+++ /dev/null
@@ -1,109 +0,0 @@
-// SPDX-License-Identifier: GPL-2.0-or-later
-
-/**
- * @file
- * @brief Global defintions for the ARM S3C2410 based a9m2410 CPU card
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-/**
- * The external clock reference is a 12.0MHz crystal
- */
-#define S3C24XX_CLOCK_REFERENCE 12000000
-
-/**
- * Define the main clock configuration to be used in register CLKDIVN
- *
- * We must limit the frequency of the connected SDRAMs with the clock ratio
- * setup to 1:2:4. This will result into FCLK:HCLK:PCLK = 200Mhz:100MHz:50MHz
- */
-#define BOARD_SPECIFIC_CLKDIVN 0x003
-
-/**
- * Define the MPLL configuration to be used in register MPLLCON
- *
- * We want the MPLL to run at 202.80MHz
- */
-#define BOARD_SPECIFIC_MPLL ((0xA1 << 12) + (3 << 4) + 1)
-
-/**
- * Define the UPLL configuration to be used in register UPLLCON
- *
- * We want the UPLL to run at 48.0MHz
- */
-#define BOARD_SPECIFIC_UPLL ((0x78 << 12) + (2 << 4) + 3)
-
-/*
- * SDRAM configuration for Samsung K4M563233E
- *  - 2M x 32Bit x 4 Banks Mobile SDRAM
- *  - 90 pin FBGA
- *  - CL2@100MHz
- */
-/*
- * SDRAM uses 32bit width
- */
-#define BOARD_SPECIFIC_BWSCON ((0x02 << 24) + (0x02 << 28))
-/*
- * 32MiB SDRAM in bank6
- *  - MT = 11 (= sync dram type)
- *  - Trcd = 00 (= CL2)
- *  - SCAN = 01 (= 9 bit columns)
- */
-#define BOARD_SPECIFIC_BANKCON6 ((0x3 << 15) + (0x0 << 2) + 0x1)
-/*
- * No memory in bank7
- */
-#define BOARD_SPECIFIC_BANKCON7 ((0x3 << 15) + (0x0 << 2) + 0x1)
-/*
- * SDRAM refresh settings
- *  - REFEN = 1 (= refresh enabled)
- *  - TREFMD = 0 (= auto refresh)
- *  - Trp = 00 (= 2 RAS precharge clocks)
- *  - Tsrc = 01 (= 5 clocks -> row cycle time @100MHz 2+5=7 -> 70ns)
- *  - Refrsh = 2^11 + 1 - 100 * 15.6 = 2049 - 1560 = 489
- */
-#define BOARD_SPECIFIC_REFRESH ((0x1 << 23) + (0x0 << 22) + (0x0 << 20) + (0x1 << 18) + 489)
-/*
- * SDRAM banksize
- *  - BURST_EN = 1 (= burst mode enabled)
- *  - SCKE_EN = 1 (= SDRAM SCKE enabled)
- *  - SCLK_EN = 1 (= clock active only during accesses)
- *  - BK67MAP = 000 (= 32MiB)
- */
-#define BOARD_SPECIFIC_BANKSIZE ((1 << 7) + (1 << 5) + (0 << 4) + 0)
-/*
- * SDRAM mode register bank6
- * CL = 010 (= 2 clocks)
- */
-#define BOARD_SPECIFIC_MRSRB6 (0x2 << 4)
-/*
- * SDRAM mode register bank7
- * CL = 010 (= 2 clocks)
- */
-#define BOARD_SPECIFIC_MRSRB7 (0x2 << 4)
-
-/*
- * Flash access timings
- * Tacls  = 0ns (but 20ns data setup time)
- * Twrph0 = 25ns (write) 35ns (read)
- * Twrph1 = 10ns (10ns data hold time)
- * Read cycle time = 50ns
- *
- * Assumed HCLK is 100MHz
- * Tacls = 1 (-> 20ns)
- * Twrph0 = 3 (-> 40ns)
- * Twrph1 = 1 (-> 20ns)
- * Cycle time = 80ns
- */
-#define A9M2410_TACLS 1
-#define A9M2410_TWRPH0 3
-#define A9M2410_TWRPH1 1
-
-/* needed in the generic NAND boot code only */
-#ifdef CONFIG_S3C_NAND_BOOT
-# define BOARD_DEFAULT_NAND_TIMING CALC_NFCONF_TIMING(A9M2410_TACLS, A9M2410_TWRPH0, A9M2410_TWRPH1)
-#endif
-
-#endif /* __CONFIG_H */
diff --git a/arch/arm/boards/a9m2410/env/bin/_update b/arch/arm/boards/a9m2410/env/bin/_update
deleted file mode 100644
index 014bce3512..0000000000
--- a/arch/arm/boards/a9m2410/env/bin/_update
+++ /dev/null
@@ -1,36 +0,0 @@
-#!/bin/sh
-
-if [ -z "$part" -o -z "$image" ]; then
-	echo "define \$part and \$image"
-	exit 1
-fi
-
-if [ ! -e "$part" ]; then
-	echo "Partition $part does not exist"
-	exit 1
-fi
-
-if [ $# = 1 ]; then
-	image=$1
-fi
-
-if [ x$ip = xdhcp ]; then
-	dhcp
-fi
-
-ping $eth0.serverip
-if [ $? -ne 0 ] ; then
-	echo "update aborted"
-	exit 1
-fi
-
-unprotect $part
-
-echo
-echo "erasing partition $part"
-erase $part
-
-echo
-echo "flashing $image to $part"
-echo
-tftp $image $part
diff --git a/arch/arm/boards/a9m2410/env/bin/boot b/arch/arm/boards/a9m2410/env/bin/boot
deleted file mode 100644
index 59fa60e4e9..0000000000
--- a/arch/arm/boards/a9m2410/env/bin/boot
+++ /dev/null
@@ -1,38 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-if [ x$1 = xnand ]; then
-	root=nand
-	kernel=nand
-fi
-
-if [ x$1 = xnet ]; then
-	root=net
-	kernel=net
-fi
-
-if [ x$ip = xdhcp ]; then
-	bootargs="$bootargs ip=dhcp"
-else
-	bootargs="$bootargs ip=$eth0.ipaddr:$eth0.serverip:$eth0.gateway:$eth0.netmask:::"
-fi
-
-if [ x$root = xnand ]; then
-	bootargs="$bootargs root=$rootpart_nand rootfstype=jffs2"
-else
-	bootargs="$bootargs root=/dev/nfs nfsroot=$eth0.serverip:$nfsroot,v3,tcp"
-fi
-
-bootargs="$bootargs mtdparts=\"NAND 32MiB 3,3V 8-bit:$nand_parts\""
-
-if [ x$kernel = xnet ]; then
-	if [ x$ip = xdhcp ]; then
-		dhcp
-	fi
-	tftp $uimage uImage || exit 1
-	bootm uImage
-else
-	bootm /dev/nand0.kernel.bb
-fi
-
diff --git a/arch/arm/boards/a9m2410/env/bin/init b/arch/arm/boards/a9m2410/env/bin/init
deleted file mode 100644
index dd94ef6be0..0000000000
--- a/arch/arm/boards/a9m2410/env/bin/init
+++ /dev/null
@@ -1,30 +0,0 @@
-#!/bin/sh
-
-PATH=/env/bin
-export PATH
-
-. /env/config
-
-if [ -e /dev/nand0 ]; then
-	addpart /dev/nand0 $nand_parts
-fi
-
-if [ -z $eth0.ethaddr ]; then
-	while [ -z $eth0.ethaddr ]; do
-		readline "no MAC address set for eth0. please enter the one found on your board: " eth0.ethaddr
-	done
-	echo -a /env/config "eth0.ethaddr=$eth0.ethaddr"
-fi
-
-echo
-echo -n "Hit any key to stop autoboot: "
-timeout -a $autoboot_timeout
-if [ $? != 0 ]; then
-	echo
-	echo "type update_kernel [<imagename>] to update kernel into flash"
-	echo "type update_root [<imagename>] to update rootfs into flash"
-	echo
-	exit
-fi
-
-boot
diff --git a/arch/arm/boards/a9m2410/env/bin/update_kernel b/arch/arm/boards/a9m2410/env/bin/update_kernel
deleted file mode 100644
index c43a55785b..0000000000
--- a/arch/arm/boards/a9m2410/env/bin/update_kernel
+++ /dev/null
@@ -1,13 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-part=/dev/nand0.kernel.bb
-
-if [ x$1 = x ]; then
-	image=$uimage
-else
-	image=$1
-fi
-
-. /env/bin/_update $image
diff --git a/arch/arm/boards/a9m2410/env/bin/update_root b/arch/arm/boards/a9m2410/env/bin/update_root
deleted file mode 100644
index 34139e5dce..0000000000
--- a/arch/arm/boards/a9m2410/env/bin/update_root
+++ /dev/null
@@ -1,11 +0,0 @@
-#!/bin/sh
-
-. /env/config
-
-if [ x$1 = x ]; then
-	image=$jffs2
-else
-	image=$1
-fi
-
-. /env/bin/_update $image
diff --git a/arch/arm/boards/a9m2410/env/config b/arch/arm/boards/a9m2410/env/config
deleted file mode 100644
index 2b09318934..0000000000
--- a/arch/arm/boards/a9m2410/env/config
+++ /dev/null
@@ -1,26 +0,0 @@
-#!/bin/sh
-
-# can be either 'net' or 'nand''
-kernel=net
-root=net
-
-uimage=uImage-a9m2410
-jffs2=root-a9m2410.jffs2
-
-autoboot_timeout=3
-
-nfsroot="/nfsexport/OSELAS.BSP-Hesch-TMU-1/platform-FS_A9M2410/root"
-bootargs="console=ttySAC0,38400"
-
-nand_parts="256k(barebox)ro,128k(bareboxenv),1536k(kernel),-(root)"
-rootpart_nand="/dev/mtdblock3"
-
-# use 'dhcp' to do dhcp in barebox and in kernel
-#ip=dhcp
-
-# or set your networking parameters here
-eth0.ipaddr=192.168.42.31
-eth0.netmask=255.255.0.0
-eth0.gateway=192.168.23.1
-eth0.serverip=192.168.23.2
-#eth0.ethaddr=
diff --git a/arch/arm/boards/a9m2410/lowlevel_init.S b/arch/arm/boards/a9m2410/lowlevel_init.S
deleted file mode 100644
index 4c949b1efa..0000000000
--- a/arch/arm/boards/a9m2410/lowlevel_init.S
+++ /dev/null
@@ -1,39 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0-only */
-
-#include <config.h>
-#include <linux/sizes.h>
-#include <mach/s3c-iomap.h>
-#include <asm/barebox-arm-head.h>
-
-	.section ".text_bare_init.barebox_arm_reset_vector","ax"
-
-.globl barebox_arm_reset_vector
-barebox_arm_reset_vector:
-
-	bl arm_cpu_lowlevel_init
-
-	bl s3c24x0_disable_wd
-
-	/* skip everything here if we are already running from SDRAM */
-	cmp pc, #S3C_SDRAM_BASE
-	blo 1f
-	cmp pc, #S3C_SDRAM_END
-	bhs 1f
-
-	b out
-
-/* we are running from NOR or NAND/SRAM memory. Do further initialisation */
-1:
-	bl s3c24x0_pll_init
-
-	bl s3c24x0_sdram_init
-
-#ifdef CONFIG_S3C_NAND_BOOT
-/* up to here we are running from the internal SRAM area */
-	bl s3c24x0_nand_boot
-#endif
-out:
-	mov r0, #S3C_SDRAM_BASE
-	mov r1, #SZ_32M
-	mov r2, #0
-	b barebox_arm_entry