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authorSascha Hauer <s.hauer@pengutronix.de>2012-10-14 22:22:39 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-02-04 15:52:39 +0100
commit94c06f9447b2c87503abb09ec666d33adb866c11 (patch)
tree4848577f8401f4e779b4a54eefbd68926e3f79a9 /arch/arm/boards/a9m2410
parent1c240cd2341776f2212237936c53c9448b21d834 (diff)
downloadbarebox-94c06f9447b2c87503abb09ec666d33adb866c11.tar.gz
barebox-94c06f9447b2c87503abb09ec666d33adb866c11.tar.xz
ARM Samsung boards: switch to barebox_arm_entry
All Samsung boards automatically detect their SDRAM size. The size detection code can't be called safely from lowlevel C code, so instead the minimum SDRAM size is guessed from the defconfig files. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/a9m2410')
-rw-r--r--arch/arm/boards/a9m2410/lowlevel_init.S9
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/boards/a9m2410/lowlevel_init.S b/arch/arm/boards/a9m2410/lowlevel_init.S
index 502ecdd354..178e73aff5 100644
--- a/arch/arm/boards/a9m2410/lowlevel_init.S
+++ b/arch/arm/boards/a9m2410/lowlevel_init.S
@@ -3,6 +3,7 @@
*/
#include <config.h>
+#include <sizes.h>
#include <mach/s3c-iomap.h>
#include <asm/barebox-arm-head.h>
@@ -21,7 +22,7 @@ reset:
cmp pc, #S3C_SDRAM_END
bhs 1f
- b board_init_lowlevel_return
+ b out
/* we are running from NOR or NAND/SRAM memory. Do further initialisation */
1:
@@ -33,4 +34,8 @@ reset:
/* up to here we are running from the internal SRAM area */
bl s3c24x0_nand_boot
#endif
- b board_init_lowlevel_return
+out:
+ mov r0, #S3C_SDRAM_BASE
+ mov r1, #SZ_32M
+ mov r2, #0
+ b barebox_arm_entry