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| author | Daniel Schultz <d.schultz@phytec.de> | 2016-01-25 08:44:14 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2016-01-26 08:01:06 +0100 |
| commit | 64a8df2f6dc6721902166fb46af6be51595d421f (patch) | |
| tree | 528a687a23f9818c063619bf77de243d199cfd0c /arch/arm/boards/afi-gf | |
| parent | a4a28df47dcd88571cb46af314c03684220bb6dd (diff) | |
| download | barebox-64a8df2f6dc6721902166fb46af6be51595d421f.tar.gz barebox-64a8df2f6dc6721902166fb46af6be51595d421f.tar.xz | |
arm: am33xx: Master Osc clock speed handling
Setup the plls with Master Osc. clock speed from the SYSBOOT
Configuration Pin.
Signed-off-by: Daniel Schultz <d.schultz@phytec.de>
Signed-off-by: Teresa Remmet <t.remmet@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/afi-gf')
| -rw-r--r-- | arch/arm/boards/afi-gf/lowlevel.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boards/afi-gf/lowlevel.c b/arch/arm/boards/afi-gf/lowlevel.c index 4aaecb9e88..efe15ec99f 100644 --- a/arch/arm/boards/afi-gf/lowlevel.c +++ b/arch/arm/boards/afi-gf/lowlevel.c @@ -222,7 +222,7 @@ static noinline int gf_sram_init(void) while(__raw_readl(AM33XX_WDT_REG(WWPS)) != 0x0); /* Setup the PLLs and the clocks for the peripherals */ - am33xx_pll_init(MPUPLL_M_500, 24, DDRPLL_M_200); + am33xx_pll_init(MPUPLL_M_500, DDRPLL_M_200); board_config_ddr(); |