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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-11-05 15:44:14 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-11-05 15:53:42 +0100 |
| commit | 21d3a53a4f7573a15fb719d49771641c5cf0bb34 (patch) | |
| tree | 50693427a33f85149cf68bd7997a76f9afe6f03d /arch/arm/boards/animeo_ip | |
| parent | 4f9e24935c78c1c13613054e024ea75446dcb4a4 (diff) | |
| download | barebox-21d3a53a4f7573a15fb719d49771641c5cf0bb34.tar.gz barebox-21d3a53a4f7573a15fb719d49771641c5cf0bb34.tar.xz | |
ARM: at91: consolidate phy reset functions
Many boards have the same ethernet phy reset function, so share the code
in a common function.
While at it remove the AT91_RSTC offset from the rstc register defines.
AT91_RSTC was the offset between the AT91_SYSTEM_BASE and the reset
controller.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/animeo_ip')
| -rw-r--r-- | arch/arm/boards/animeo_ip/init.c | 20 |
1 files changed, 1 insertions, 19 deletions
diff --git a/arch/arm/boards/animeo_ip/init.c b/arch/arm/boards/animeo_ip/init.c index 847417398a..775c818df6 100644 --- a/arch/arm/boards/animeo_ip/init.c +++ b/arch/arm/boards/animeo_ip/init.c @@ -231,30 +231,12 @@ static void animeo_ip_power_control(void) static void animeo_ip_phy_reset(void) { - unsigned long rstc; int i; - struct clk *clk = clk_get(NULL, "macb_clk"); - - clk_enable(clk); for (i = AT91_PIN_PA12; i <= AT91_PIN_PA29; i++) at91_set_gpio_input(i, 0); - rstc = at91_sys_read(AT91_RSTC_MR) & AT91_RSTC_ERSTL; - - /* Need to reset PHY -> 500ms reset */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | - (AT91_RSTC_ERSTL & (0x0d << 8)) | - AT91_RSTC_URSTEN); - - at91_sys_write(AT91_RSTC_CR, AT91_RSTC_KEY | AT91_RSTC_EXTRST); - - /* Wait for end hardware reset */ - while (!(at91_sys_read(AT91_RSTC_SR) & AT91_RSTC_NRSTL)) - ; - - /* Restore NRST value */ - at91_sys_write(AT91_RSTC_MR, AT91_RSTC_KEY | (rstc) | AT91_RSTC_URSTEN); + at91sam_phy_reset(IOMEM(AT91SAM9260_BASE_RSTC)); } #define MACB_SA1B 0x0098 |