ARM: i.MX6: Add dfi fs700 m60 i.MX6 Q7 board support

This is an i.MX6 based Q7 module, see:

http://www.dfi.com.tw/products/ProductDetails.jsp?productId=1164&mainCategoryId=2&subCategoryId=581

This patch adds basic support for this module.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

5 files changed, 378 insertions, 0 deletions

diff --git a/arch/arm/boards/dfi-fs700-m60/Makefile b/arch/arm/boards/dfi-fs700-m60/Makefile
new file mode 100644
index 0000000000..28d4f296c3
--- /dev/null
+++ b/arch/arm/boards/dfi-fs700-m60/Makefile
@@ -0,0 +1,5 @@
+obj-y += board.o
+obj-y += flash-header-fs700-m60-6s.dcd.o flash-header-fs700-m60-6q.dcd.o
+extra-y += flash-header-fs700-m60-6s.dcd.S flash-header-fs700-m60-6q.dcd.S
+extra-y += flash-header-fs700-m60-6s.dcd flash-header-fs700-m60-6q.dcd
+lwl-y += lowlevel.o
diff --git a/arch/arm/boards/dfi-fs700-m60/board.c b/arch/arm/boards/dfi-fs700-m60/board.c
new file mode 100644
index 0000000000..9894654bd3
--- /dev/null
+++ b/arch/arm/boards/dfi-fs700-m60/board.c
@@ -0,0 +1,80 @@
+/*
+ * Copyright (C) 2013 Sascha Hauer, Pengutronix
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation.
+ *
+ */
+#define pr_fmt(fmt)  "dfi-fs700-m60: " fmt
+
+#include <generated/mach-types.h>
+#include <common.h>
+#include <sizes.h>
+#include <envfs.h>
+#include <init.h>
+#include <gpio.h>
+#include <net.h>
+#include <linux/phy.h>
+
+#include <asm/armlinux.h>
+#include <asm/memory.h>
+#include <asm/mmu.h>
+#include <asm/io.h>
+
+#include <mach/imx6-regs.h>
+#include <mach/generic.h>
+#include <mach/bbu.h>
+
+static int ar8031_phy_fixup(struct phy_device *dev)
+{
+	u16 val;
+
+	/* To enable AR8031 ouput a 125MHz clk from CLK_25M */
+	phy_write(dev, 0xd, 0x7);
+	phy_write(dev, 0xe, 0x8016);
+	phy_write(dev, 0xd, 0x4007);
+
+	val = phy_read(dev, 0xe);
+	val &= 0xffe3;
+	val |= 0x18;
+	phy_write(dev, 0xe, val);
+
+	/* introduce tx clock delay */
+	phy_write(dev, 0x1d, 0x5);
+	val = phy_read(dev, 0x1e);
+	val |= 0x0100;
+	phy_write(dev, 0x1e, val);
+
+	return 0;
+}
+
+#define PHY_ID_AR8031	0x004dd074
+#define AR_PHY_ID_MASK	0xffffffff
+
+static int dfi_fs700_m60_init(void)
+{
+	if (!of_machine_is_compatible("dfi,fs700-m60"))
+		return 0;
+
+	phy_register_fixup_for_uid(PHY_ID_AR8031, AR_PHY_ID_MASK, ar8031_phy_fixup);
+
+	imx6_bbu_internal_mmc_register_handler("mmc", "/dev/mmc3.boot0",
+		BBU_HANDLER_FLAG_DEFAULT, NULL, 0, 0);
+
+	armlinux_set_bootparams((void *)0x10000100);
+	armlinux_set_architecture(MACH_TYPE_MX6Q_SABRESD);
+
+	return 0;
+}
+device_initcall(dfi_fs700_m60_init);
diff --git a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q.imxcfg b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q.imxcfg
new file mode 100644
index 0000000000..f88157f9b8
--- /dev/null
+++ b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6q.imxcfg
@@ -0,0 +1,128 @@
+loadaddr 0x27800000
+soc imx6
+dcdofs 0x400
+wm 32 0x020e05a8 0x00000030
+wm 32 0x020e05b0 0x00000030
+wm 32 0x020e0524 0x00000030
+wm 32 0x020e051c 0x00000030
+
+wm 32 0x020e0518 0x00000030
+wm 32 0x020e050c 0x00000030
+wm 32 0x020e05b8 0x00000030
+wm 32 0x020e05c0 0x00000030
+
+wm 32 0x020e05ac 0x00020030
+wm 32 0x020e05b4 0x00020030
+wm 32 0x020e0528 0x00020030
+wm 32 0x020e0520 0x00020030
+
+wm 32 0x020e0514 0x00020030
+wm 32 0x020e0510 0x00020030
+wm 32 0x020e05bc 0x00020030
+wm 32 0x020e05c4 0x00020030
+
+wm 32 0x020e056c 0x00020030
+wm 32 0x020e0578 0x00020030
+wm 32 0x020e0588 0x00020030
+wm 32 0x020e0594 0x00020030
+
+wm 32 0x020e057c 0x00020030
+wm 32 0x020e0590 0x00003000
+wm 32 0x020e0598 0x00003000
+wm 32 0x020e058c 0x00000000
+
+wm 32 0x020e059c 0x00003030
+wm 32 0x020e05a0 0x00003030
+wm 32 0x020e0784 0x00000030
+wm 32 0x020e0788 0x00000030
+
+wm 32 0x020e0794 0x00000030
+wm 32 0x020e079c 0x00000030
+wm 32 0x020e07a0 0x00000030
+wm 32 0x020e07a4 0x00000030
+
+wm 32 0x020e07a8 0x00000030
+wm 32 0x020e0748 0x00000030
+wm 32 0x020e074c 0x00000030
+wm 32 0x020e0750 0x00020000
+
+wm 32 0x020e0758 0x00000000
+wm 32 0x020e0774 0x00020000
+wm 32 0x020e078c 0x00000030
+wm 32 0x020e0798 0x000C0000
+
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+
+wm 32 0x021b481c 0x33333333
+wm 32 0x021b4820 0x33333333
+wm 32 0x021b4824 0x33333333
+wm 32 0x021b4828 0x33333333
+
+wm 32 0x021b0018 0x00081740
+
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b000c 0x555A7974
+wm 32 0x021b0010 0xDB538F64
+wm 32 0x021b0014 0x01FF00DB
+wm 32 0x021b002c 0x000026D2
+
+wm 32 0x021b0030 0x005A1023
+wm 32 0x021b0008 0x09444040
+wm 32 0x021b0004 0x00025576
+wm 32 0x021b0040 0x00000027
+wm 32 0x021b0000 0x831A0000
+
+wm 32 0x021b001c 0x04088032
+wm 32 0x021b001c 0x0408803A
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x0000803B
+wm 32 0x021b001c 0x00428031
+wm 32 0x021b001c 0x00428039
+wm 32 0x021b001c 0x19308030
+wm 32 0x021b001c 0x19308038
+
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b001c 0x04008048
+wm 32 0x021b0800 0xA1380003
+wm 32 0x021b4800 0xA1380003
+wm 32 0x021b0020 0x00005800
+wm 32 0x021b0818 0x00022227
+wm 32 0x021b4818 0x00022227
+
+wm 32 0x021b083c 0x434B0350
+wm 32 0x021b0840 0x034C0359
+wm 32 0x021b483c 0x434B0350
+wm 32 0x021b4840 0x03650348
+wm 32 0x021b0848 0x4436383B
+wm 32 0x021b4848 0x39393341
+wm 32 0x021b0850 0x35373933
+wm 32 0x021b4850 0x48254A36
+
+wm 32 0x021b080c 0x001F001F
+wm 32 0x021b0810 0x001F001F
+
+wm 32 0x021b480c 0x00440044
+wm 32 0x021b4810 0x00440044
+
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b48b8 0x00000800
+
+wm 32 0x021b001c 0x00000000
+wm 32 0x021b0404 0x00011006
+
+wm 32 0x020c4068 0x00C03F3F
+wm 32 0x020c406c 0x0030FC03
+wm 32 0x020c4070 0x0FFFC000
+wm 32 0x020c4074 0x3FF00000
+wm 32 0x020c4078 0x00FFF300
+wm 32 0x020c407c 0x0F0000C3
+wm 32 0x020c4080 0x000003FF
+
+
+wm 32 0x020e0010 0xF00000CF
+
+wm 32 0x020e0018 0x007F007F
+wm 32 0x020e001c 0x007F007F
diff --git a/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg
new file mode 100644
index 0000000000..9f5b14f860
--- /dev/null
+++ b/arch/arm/boards/dfi-fs700-m60/flash-header-fs700-m60-6s.imxcfg
@@ -0,0 +1,63 @@
+loadaddr 0x17800000
+soc imx6
+dcdofs 0x400
+
+wm 32 0x020e0774 0x000c0000
+wm 32 0x020e0754 0x00000000
+wm 32 0x020e04ac 0x00000030
+wm 32 0x020e04b0 0x00000030
+wm 32 0x020e0464 0x00000030
+wm 32 0x020e0490 0x00000030
+wm 32 0x020e074c 0x00000030
+wm 32 0x020e0494 0x00000030
+wm 32 0x020e04a0 0x00000000
+wm 32 0x020e04b4 0x00000030
+wm 32 0x020e04b8 0x00000030
+wm 32 0x020e076c 0x00000030
+wm 32 0x020e0750 0x00020000
+wm 32 0x020e04bc 0x00000030
+wm 32 0x020e04c0 0x00000030
+wm 32 0x020e04c4 0x00000030
+wm 32 0x020e04c8 0x00000030
+wm 32 0x020e0760 0x00020000
+wm 32 0x020e0764 0x00000030
+wm 32 0x020e0770 0x00000030
+wm 32 0x020e0778 0x00000030
+wm 32 0x020e077c 0x00000030
+wm 32 0x020e0470 0x00000030
+wm 32 0x020e0474 0x00000030
+wm 32 0x020e0478 0x00000030
+wm 32 0x020e047c 0x00000030
+wm 32 0x021b0800 0xa1390003
+wm 32 0x021b080c 0x001f001f
+wm 32 0x021b0810 0x001f001f
+wm 32 0x021b083c 0x42190219
+wm 32 0x021b0840 0x017b0177
+wm 32 0x021b0848 0x4b4d4e4d
+wm 32 0x021b0850 0x3f3e2d36
+wm 32 0x021b081c 0x33333333
+wm 32 0x021b0820 0x33333333
+wm 32 0x021b0824 0x33333333
+wm 32 0x021b0828 0x33333333
+wm 32 0x021b08b8 0x00000800
+wm 32 0x021b0004 0x0002002d
+wm 32 0x021b0008 0x00333030
+wm 32 0x021b000c 0x3f435313
+wm 32 0x021b0010 0xb66e8b63
+wm 32 0x021b0014 0x01ff00db
+wm 32 0x021b0018 0x00001740
+wm 32 0x021b001c 0x00008000
+wm 32 0x021b002c 0x000026d2
+wm 32 0x021b0030 0x00431023
+wm 32 0x021b0040 0x00000027
+wm 32 0x021b0000 0x84190000
+wm 32 0x021b001c 0x04008032
+wm 32 0x021b001c 0x00008033
+wm 32 0x021b001c 0x00048031
+wm 32 0x021b001c 0x05208030
+wm 32 0x021b001c 0x04008040
+wm 32 0x021b0020 0x00005800
+wm 32 0x021b0818 0x00011117
+wm 32 0x021b0004 0x0002556d
+wm 32 0x021b0404 0x00011006
+wm 32 0x021b001c 0x00000000
diff --git a/arch/arm/boards/dfi-fs700-m60/lowlevel.c b/arch/arm/boards/dfi-fs700-m60/lowlevel.c
new file mode 100644
index 0000000000..725c58dd28
--- /dev/null
+++ b/arch/arm/boards/dfi-fs700-m60/lowlevel.c
@@ -0,0 +1,102 @@
+/*
+ * Copyright (C) 2013 Sascha Hauer <s.hauer@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ */
+#include <common.h>
+#include <sizes.h>
+#include <io.h>
+#include <asm/sections.h>
+#include <asm/mmu.h>
+#include <asm/barebox-arm-head.h>
+#include <asm/barebox-arm.h>
+#include <mach/imx6-mmdc.h>
+#include <mach/imx6-regs.h>
+
+#include <debug_ll.h>
+
+static inline void early_uart_init(void)
+{
+	writel(0x00000000, MX6_UART1_BASE_ADDR + 0x80);
+	writel(0x00004027, MX6_UART1_BASE_ADDR + 0x84);
+	writel(0x00000704, MX6_UART1_BASE_ADDR + 0x88);
+	writel(0x00000a81, MX6_UART1_BASE_ADDR + 0x90);
+	writel(0x0000002b, MX6_UART1_BASE_ADDR + 0x9c);
+	writel(0x00013880, MX6_UART1_BASE_ADDR + 0xb0);
+	writel(0x0000047f, MX6_UART1_BASE_ADDR + 0xa4);
+	writel(0x0000c34f, MX6_UART1_BASE_ADDR + 0xa8);
+	writel(0x00000001, MX6_UART1_BASE_ADDR + 0x80);
+}
+
+static inline void early_uart_init_6q(void)
+{
+	writel(0x3, MX6_IOMUXC_BASE_ADDR + 0x280);
+	writel(0x3, MX6_IOMUXC_BASE_ADDR + 0x284);
+	writel(0x1, MX6_IOMUXC_BASE_ADDR + 0x920);
+	writel(0x0001b0b1, MX6_IOMUXC_BASE_ADDR + 0x650);
+	writel(0x0001b0b1, MX6_IOMUXC_BASE_ADDR + 0x654);
+
+	early_uart_init();
+}
+
+static inline void early_uart_init_6s(void)
+{
+	writel(0x3, MX6_IOMUXC_BASE_ADDR + 0x4c);
+	writel(0x3, MX6_IOMUXC_BASE_ADDR + 0x50);
+	writel(0x1, MX6_IOMUXC_BASE_ADDR + 0x8fc);
+	writel(0x0001b0b1, MX6_IOMUXC_BASE_ADDR + 0x360);
+	writel(0x0001b0b1, MX6_IOMUXC_BASE_ADDR + 0x364);
+
+	early_uart_init();
+}
+
+extern char __dtb_imx6q_dfi_fs700_m60_6q_start[];
+
+ENTRY_FUNCTION(start_imx6q_dfi_fs700_m60_6q)(void)
+{
+	uint32_t fdt;
+
+	__barebox_arm_head();
+
+	arm_cpu_lowlevel_init();
+
+	arm_setup_stack(0x00940000 - 8);
+
+	early_uart_init_6q();
+
+	fdt = (uint32_t)__dtb_imx6q_dfi_fs700_m60_6q_start - get_runtime_offset();
+
+	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+}
+
+extern char __dtb_imx6dl_dfi_fs700_m60_6s_start[];
+
+ENTRY_FUNCTION(start_imx6dl_dfi_fs700_m60_6s)(void)
+{
+	uint32_t fdt;
+	int i;
+
+	__barebox_arm_head();
+
+	arm_cpu_lowlevel_init();
+
+	arm_setup_stack(0x00920000 - 8);
+
+	for (i = 0x68; i <= 0x80; i += 4)
+		writel(0xffffffff, MX6_CCM_BASE_ADDR + i);
+
+	early_uart_init_6s();
+
+	fdt = (uint32_t)__dtb_imx6dl_dfi_fs700_m60_6s_start - get_runtime_offset();
+
+	barebox_arm_entry(0x10000000, SZ_1G, fdt);
+}