ARM: imx: use register defines in imxcfg files instead of plain numbers

This makes the imxcfg files more readable and also makes it possible to
share more assignments between machines that just differ by the used
SoC. (Though I have to admit that in the cases converted here it just
more easily allows to see that the RAM config differs more than probably
necessary.)

This change is intended to have no effect on the built artifacts.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>

1 files changed, 86 insertions, 83 deletions

diff --git a/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg b/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg
index 52edefd77a..1139312da6 100644
--- a/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg
+++ b/arch/arm/boards/embedsky-e9/flash-header-e9.imxcfg
@@ -2,86 +2,89 @@ loadaddr 0x27800000
 soc imx6
 dcdofs 0x400
 
-wm 32 0x020e0798 0x000c0000
-wm 32 0x020e0758 0x00000000
-wm 32 0x020e0588 0x00000030
-wm 32 0x020e0594 0x00000030
-wm 32 0x020e056c 0x00000030
-wm 32 0x020e0578 0x00000030
-wm 32 0x020e074c 0x00000030
-wm 32 0x020e057c 0x00000030
-wm 32 0x020e058c 0x00000000
-wm 32 0x020e059c 0x00000030
-wm 32 0x020e05a0 0x00000030
-wm 32 0x020e078c 0x00000030
-wm 32 0x020e0750 0x00020000
-wm 32 0x020e05a8 0x00000018
-wm 32 0x020e05b0 0x00000018
-wm 32 0x020e0524 0x00000018
-wm 32 0x020e051c 0x00000018
-wm 32 0x020e0518 0x00000018
-wm 32 0x020e050c 0x00000018
-wm 32 0x020e05b8 0x00000018
-wm 32 0x020e05c0 0x00000018
-wm 32 0x020e0774 0x00020000
-wm 32 0x020e0784 0x00000018
-wm 32 0x020e0788 0x00000018
-wm 32 0x020e0794 0x00000018
-wm 32 0x020e079c 0x00000018
-wm 32 0x020e07a0 0x00000018
-wm 32 0x020e07a4 0x00000018
-wm 32 0x020e07a8 0x00000018
-wm 32 0x020e0748 0x00000018
-wm 32 0x020e05ac 0x00000018
-wm 32 0x020e05b4 0x00000018
-wm 32 0x020e0528 0x00000018
-wm 32 0x020e0520 0x00000018
-wm 32 0x020e0514 0x00000018
-wm 32 0x020e0510 0x00000018
-wm 32 0x020e05bc 0x00000018
-wm 32 0x020e05c4 0x00000018
-wm 32 0x021b0800 0xa1390003
-wm 32 0x021b080c 0x001f001f
-wm 32 0x021b0810 0x001f001f
-wm 32 0x021b480c 0x001f001f
-wm 32 0x021b4810 0x001f001f
-wm 32 0x021b083c 0x4333033f
-wm 32 0x021b0840 0x032c031d
-wm 32 0x021b483c 0x43200332
-wm 32 0x021b4840 0x031a026a
-wm 32 0x021b0848 0x4d464746
-wm 32 0x021b4848 0x47453f4d
-wm 32 0x021b0850 0x3e434440
-wm 32 0x021b4850 0x47384839
-wm 32 0x021b081c 0x33333333
-wm 32 0x021b0820 0x33333333
-wm 32 0x021b0824 0x33333333
-wm 32 0x021b0828 0x33333333
-wm 32 0x021b481c 0x33333333
-wm 32 0x021b4820 0x33333333
-wm 32 0x021b4824 0x33333333
-wm 32 0x021b4828 0x33333333
-wm 32 0x021b08b8 0x00000800
-wm 32 0x021b48b8 0x00000800
-wm 32 0x021b0004 0x00020036
-wm 32 0x021b0008 0x09444040
-wm 32 0x021b000c 0x8a8f7955
-wm 32 0x021b0010 0xff328f64
-wm 32 0x021b0014 0x01ff00db
-wm 32 0x021b0018 0x00001740
-wm 32 0x021b001c 0x00008000
-wm 32 0x021b002c 0x000026d2
-wm 32 0x021b0030 0x008f1023
-wm 32 0x021b0040 0x00000047
-wm 32 0x021b0000 0x841a0000
-wm 32 0x021b001c 0x04088032
-wm 32 0x021b001c 0x00008033
-wm 32 0x021b001c 0x00048031
-wm 32 0x021b001c 0x09408030
-wm 32 0x021b001c 0x04008040
-wm 32 0x021b0020 0x00005800
-wm 32 0x021b0818 0x00011117
-wm 32 0x021b4818 0x00011117
-wm 32 0x021b0004 0x00025576
-wm 32 0x021b0404 0x00011006
-wm 32 0x021b001c 0x00000000
+#include <mach/imx6-ddr-regs.h>
+#include <mach/imx6q-ddr-regs.h>
+
+wm 32 MX6_IOM_GRP_DDR_TYPE 0x000c0000
+wm 32 MX6_IOM_GRP_DDRPKE 0x00000000
+wm 32 MX6_IOM_DRAM_SDCLK_0 0x00000030
+wm 32 MX6_IOM_DRAM_SDCLK_1 0x00000030
+wm 32 MX6_IOM_DRAM_CAS 0x00000030
+wm 32 MX6_IOM_DRAM_RAS 0x00000030
+wm 32 MX6_IOM_GRP_ADDDS 0x00000030
+wm 32 MX6_IOM_DRAM_RESET 0x00000030
+wm 32 MX6_IOM_DRAM_SDBA2 0x00000000
+wm 32 MX6_IOM_DRAM_SDODT0 0x00000030
+wm 32 MX6_IOM_DRAM_SDODT1 0x00000030
+wm 32 MX6_IOM_GRP_CTLDS 0x00000030
+wm 32 MX6_IOM_DDRMODE_CTL 0x00020000
+wm 32 MX6_IOM_DRAM_SDQS0 0x00000018
+wm 32 MX6_IOM_DRAM_SDQS1 0x00000018
+wm 32 MX6_IOM_DRAM_SDQS2 0x00000018
+wm 32 MX6_IOM_DRAM_SDQS3 0x00000018
+wm 32 MX6_IOM_DRAM_SDQS4 0x00000018
+wm 32 MX6_IOM_DRAM_SDQS5 0x00000018
+wm 32 MX6_IOM_DRAM_SDQS6 0x00000018
+wm 32 MX6_IOM_DRAM_SDQS7 0x00000018
+wm 32 MX6_IOM_GRP_DDRMODE 0x00020000
+wm 32 MX6_IOM_GRP_B0DS 0x00000018
+wm 32 MX6_IOM_GRP_B1DS 0x00000018
+wm 32 MX6_IOM_GRP_B2DS 0x00000018
+wm 32 MX6_IOM_GRP_B3DS 0x00000018
+wm 32 MX6_IOM_GRP_B4DS 0x00000018
+wm 32 MX6_IOM_GRP_B5DS 0x00000018
+wm 32 MX6_IOM_GRP_B6DS 0x00000018
+wm 32 MX6_IOM_GRP_B7DS 0x00000018
+wm 32 MX6_IOM_DRAM_DQM0 0x00000018
+wm 32 MX6_IOM_DRAM_DQM1 0x00000018
+wm 32 MX6_IOM_DRAM_DQM2 0x00000018
+wm 32 MX6_IOM_DRAM_DQM3 0x00000018
+wm 32 MX6_IOM_DRAM_DQM4 0x00000018
+wm 32 MX6_IOM_DRAM_DQM5 0x00000018
+wm 32 MX6_IOM_DRAM_DQM6 0x00000018
+wm 32 MX6_IOM_DRAM_DQM7 0x00000018
+wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390003
+wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x001f001f
+wm 32 MX6_MMDC_P0_MPWLDECTRL1 0x001f001f
+wm 32 MX6_MMDC_P1_MPWLDECTRL0 0x001f001f
+wm 32 MX6_MMDC_P1_MPWLDECTRL1 0x001f001f
+wm 32 MX6_MMDC_P0_MPDGCTRL0 0x4333033f
+wm 32 MX6_MMDC_P0_MPDGCTRL1 0x032c031d
+wm 32 MX6_MMDC_P1_MPDGCTRL0 0x43200332
+wm 32 MX6_MMDC_P1_MPDGCTRL1 0x031a026a
+wm 32 MX6_MMDC_P0_MPRDDLCTL 0x4d464746
+wm 32 MX6_MMDC_P1_MPRDDLCTL 0x47453f4d
+wm 32 MX6_MMDC_P0_MPWRDLCTL 0x3e434440
+wm 32 MX6_MMDC_P1_MPWRDLCTL 0x47384839
+wm 32 MX6_MMDC_P0_MPRDDQBY0DL 0x33333333
+wm 32 MX6_MMDC_P0_MPRDDQBY1DL 0x33333333
+wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333
+wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY0DL 0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY1DL 0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY2DL 0x33333333
+wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333
+wm 32 MX6_MMDC_P0_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P1_MPMUR0 0x00000800
+wm 32 MX6_MMDC_P0_MDPDC 0x00020036
+wm 32 MX6_MMDC_P0_MDOTC 0x09444040
+wm 32 MX6_MMDC_P0_MDCFG0 0x8a8f7955
+wm 32 MX6_MMDC_P0_MDCFG1 0xff328f64
+wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00db
+wm 32 MX6_MMDC_P0_MDMISC 0x00001740
+wm 32 MX6_MMDC_P0_MDSCR 0x00008000
+wm 32 MX6_MMDC_P0_MDRWD 0x000026d2
+wm 32 MX6_MMDC_P0_MDOR 0x008f1023
+wm 32 MX6_MMDC_P0_MDASP 0x00000047
+wm 32 MX6_MMDC_P0_MDCTL 0x841a0000
+wm 32 MX6_MMDC_P0_MDSCR 0x04088032
+wm 32 MX6_MMDC_P0_MDSCR 0x00008033
+wm 32 MX6_MMDC_P0_MDSCR 0x00048031
+wm 32 MX6_MMDC_P0_MDSCR 0x09408030
+wm 32 MX6_MMDC_P0_MDSCR 0x04008040
+wm 32 MX6_MMDC_P0_MDREF 0x00005800
+wm 32 MX6_MMDC_P0_MPODTCTRL 0x00011117
+wm 32 MX6_MMDC_P1_MPODTCTRL 0x00011117
+wm 32 MX6_MMDC_P0_MDPDC 0x00025576
+wm 32 MX6_MMDC_P0_MAPSR 0x00011006
+wm 32 MX6_MMDC_P0_MDSCR 0x00000000