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| author | Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com> | 2010-07-22 05:00:13 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-07-23 08:35:25 +0200 |
| commit | d8c86961b333a9c88cf2aa4282a43b8382e9b810 (patch) | |
| tree | cf8b39db96805a2ed876ba14f6824a96ebffc906 /arch/arm/boards/guf-neso/pll_init.S | |
| parent | d879de38e8430eeb9b37b7b6a2ac3341b0b029f7 (diff) | |
| download | barebox-d8c86961b333a9c88cf2aa4282a43b8382e9b810.tar.gz barebox-d8c86961b333a9c88cf2aa4282a43b8382e9b810.tar.xz | |
move boards to arch/<architecure>/boards
this will allow each arch to handle the boards more simply and depending on
there need
the env var BOARD will refer to the current board dirent
for sandbox as we have only one board the board dirent is arch/sandbox/board
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/guf-neso/pll_init.S')
| -rw-r--r-- | arch/arm/boards/guf-neso/pll_init.S | 48 |
1 files changed, 48 insertions, 0 deletions
diff --git a/arch/arm/boards/guf-neso/pll_init.S b/arch/arm/boards/guf-neso/pll_init.S new file mode 100644 index 0000000000..87e5312fb4 --- /dev/null +++ b/arch/arm/boards/guf-neso/pll_init.S @@ -0,0 +1,48 @@ +#include <config.h> +#include <mach/imx-regs.h> +#include <mach/imx-pll.h> +#include <linux/linkage.h> + +#define writel(val, reg) \ + ldr r0, =reg; \ + ldr r1, =val; \ + str r1, [r0]; + +#define CSCR_VAL CSCR_USB_DIV(3) | \ + CSCR_SD_CNT(3) | \ + CSCR_MSHC_SEL | \ + CSCR_H264_SEL | \ + CSCR_SSI1_SEL | \ + CSCR_SSI2_SEL | \ + CSCR_MCU_SEL | \ + CSCR_ARM_SRC_MPLL | \ + CSCR_SP_SEL | \ + CSCR_ARM_DIV(0) | \ + CSCR_FPM_EN | \ + CSCR_SPEN | \ + CSCR_MPEN | \ + CSCR_AHB_DIV(1) + +ENTRY(neso_pll_init) + + writel(IMX_PLL_PD(0) | + IMX_PLL_MFD(51) | + IMX_PLL_MFI(7) | + IMX_PLL_MFN(35), MPCTL0) /* 399 MHz */ + + writel(IMX_PLL_PD(1) | + IMX_PLL_MFD(12) | + IMX_PLL_MFI(9) | + IMX_PLL_MFN(3), SPCTL0) /* SPLL = 2 * 26 * 4.61538 MHz = 240 MHz */ + + writel(CSCR_VAL | CSCR_MPLL_RESTART | CSCR_SPLL_RESTART, CSCR) + + ldr r2, =16000 +1: + subs r2, r2, #1 + nop + bcs 1b + + mov pc, lr +ENDPROC(neso_pll_init) + |