diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-04-06 20:55:10 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-04-06 20:55:10 +0200 |
| commit | aa45c51b965d907ab79f777500e616338fe7de31 (patch) | |
| tree | ecc4dd3ad304fa7b9d7de7a6ee7378b341b2edd5 /arch/arm/boards/karo-tx6x | |
| parent | eec2e9b2433983c775a692295a3c06799a9811d4 (diff) | |
| parent | 6eb2ba6f1b206bb7d688036a28c98eb4a89be781 (diff) | |
| download | barebox-aa45c51b965d907ab79f777500e616338fe7de31.tar.gz barebox-aa45c51b965d907ab79f777500e616338fe7de31.tar.xz | |
Merge branch 'for-next/imx'
Diffstat (limited to 'arch/arm/boards/karo-tx6x')
4 files changed, 37 insertions, 37 deletions
diff --git a/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg b/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg index b5c59e3c3c..7e244edfd3 100644 --- a/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg +++ b/arch/arm/boards/karo-tx6x/1600mhz_4x128mx16.imxcfg @@ -1,12 +1,12 @@ /* MDMISC mirroring interleaved (row/bank/col) */ wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x831a0000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x3f435333 wm 32 MX6_MMDC_P0_MDCFG1 0x926e8a63 @@ -34,7 +34,7 @@ wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xA1380000 wm 32 MX6_MMDC_P0_MPWLDECTRL0 0x001e001e @@ -62,11 +62,11 @@ wm 32 MX6_MMDC_P1_MPWRDLCTL 0x40404040 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MPDGCTRL0 0x80000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MPDGCTRL0 0x80000000 +check 32 until_all_bits_set MX6_MMDC_P0_MPDGCTRL0 0x80000000 wm 32 MX6_MMDC_P0_MPDGCTRL0 0x80000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MPDGCTRL0 0x80000000 +check 32 until_all_bits_set MX6_MMDC_P0_MPDGCTRL0 0x80000000 wm 32 MX6_MMDC_P0_MPDGCTRL0 0x50800000 -check 32 while_all_bits_clear MX6_MMDC_P0_MPDGCTRL0 0x10001000 +check 32 until_all_bits_set MX6_MMDC_P0_MPDGCTRL0 0x10001000 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 wm 32 MX6_IOM_DRAM_SDQS1 0x00000030 @@ -81,16 +81,16 @@ wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f -check 32 while_all_bits_clear MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 @@ -98,4 +98,4 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00001006 wm 32 MX6_MMDC_P0_MDPDC 0x0002556d wm 32 MX6_MMDC_P1_MDPDC 0x0002556d wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg index c58ef4e35a..3f6578e19c 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6dl-512m.imxcfg @@ -92,11 +92,11 @@ wm 32 MX6_MMDC_P0_MPRDDQBY2DL 0x33333333 wm 32 MX6_MMDC_P0_MPRDDQBY3DL 0x33333333 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x83190000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x3f435333 wm 32 MX6_MMDC_P0_MDCFG1 0xb66e8a63 wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00db @@ -117,7 +117,7 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00000001 wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000 wm 32 MX6_MMDC_P0_MDSCR 0x00048033 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 @@ -126,14 +126,14 @@ wm 32 MX6_IOM_DRAM_SDQS2 0x00000030 wm 32 MX6_IOM_DRAM_SDQS3 0x00000030 wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 wm 32 MX6_MMDC_P0_MAPSR 0x00001000 wm 32 MX6_MMDC_P0_MDPDC 0x0002556d wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg index 56cb3292a9..165b69fb19 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6q-1g.imxcfg @@ -119,11 +119,11 @@ wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x831a0000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x545a79a4 wm 32 MX6_MMDC_P0_MDCFG1 0xff538e64 wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00dd @@ -145,7 +145,7 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00000001 wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000 wm 32 MX6_MMDC_P0_MDSCR 0x00048033 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 @@ -159,19 +159,19 @@ wm 32 MX6_IOM_DRAM_SDQS7 0x00000030 wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f -check 32 while_all_bits_clear MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 wm 32 MX6_MMDC_P0_MAPSR 0x00001000 wm 32 MX6_MMDC_P0_MDPDC 0x00025576 wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 diff --git a/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg index 4eaca00fc7..fc00de957c 100644 --- a/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg +++ b/arch/arm/boards/karo-tx6x/flash-header-tx6qp-2g.imxcfg @@ -128,11 +128,11 @@ wm 32 MX6_MMDC_P1_MPRDDQBY3DL 0x33333333 wm 32 MX6_MMDC_P0_MPMUR0 0x00000800 wm 32 MX6_MMDC_P1_MPMUR0 0x00000800 wm 32 MX6_MMDC_P0_MDMISC 0x00000742 -check 32 while_all_bits_clear MX6_MMDC_P0_MDMISC 0x00000002 +check 32 until_all_bits_set MX6_MMDC_P0_MDMISC 0x00000002 wm 32 MX6_MMDC_P0_MDSCR 0x00008000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_any_bit_set MX6_MMDC_P0_MDSCR 0x00004000 wm 32 MX6_MMDC_P0_MDCTL 0x841a0000 -check 32 while_any_bit_clear MX6_MMDC_P0_MDMISC 0x40000000 +check 32 until_any_bit_set MX6_MMDC_P0_MDMISC 0x40000000 wm 32 MX6_MMDC_P0_MDCFG0 0x898f78f4 wm 32 MX6_MMDC_P0_MDCFG1 0xff328e64 wm 32 MX6_MMDC_P0_MDCFG2 0x01ff00db @@ -155,7 +155,7 @@ wm 32 MX6_MMDC_P0_MAPSR 0x00000001 wm 32 MX6_MMDC_P0_MDSCR 0x04008010 wm 32 MX6_MMDC_P0_MDSCR 0x04008040 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1390001 -check 32 while_all_bits_clear MX6_MMDC_P0_MPZQHWCTRL 0x00010000 +check 32 until_all_bits_set MX6_MMDC_P0_MPZQHWCTRL 0x00010000 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa1380000 wm 32 MX6_MMDC_P0_MDSCR 0x00048033 wm 32 MX6_IOM_DRAM_SDQS0 0x00000030 @@ -169,18 +169,18 @@ wm 32 MX6_IOM_DRAM_SDQS7 0x00000030 wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPRDDLHWCTL 0x00000030 wm 32 MX6_MMDC_P1_MPRDDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f -check 32 while_all_bits_clear MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPRDDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPRDDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P0_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P0_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x04008050 wm 32 MX6_MMDC_P1_MPWRDLHWCTL 0x00000030 -check 32 while_all_bits_clear MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f +check 32 until_all_bits_set MX6_MMDC_P1_MPWRDLHWCTL 0x0000001f wm 32 MX6_MMDC_P0_MDSCR 0x00008033 wm 32 MX6_MMDC_P0_MPZQHWCTRL 0xa138002b wm 32 MX6_MMDC_P0_MDREF 0x00001800 wm 32 MX6_MMDC_P0_MAPSR 0x00001000 wm 32 MX6_MMDC_P0_MDPDC 0x00025576 wm 32 MX6_MMDC_P0_MDSCR 0x00000000 -check 32 while_all_bits_clear MX6_MMDC_P0_MDSCR 0x00004000 +check 32 until_all_bits_set MX6_MMDC_P0_MDSCR 0x00004000 |