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| author | Stefan Riedmueller <s.riedmueller@phytec.de> | 2019-07-10 13:17:28 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-07-11 07:15:33 +0200 |
| commit | c89da1684ec9886093213640e926c86a6e27bec1 (patch) | |
| tree | 911419fad748250178e60654faf4cabb78cf7666 /arch/arm/boards/phytec-som-imx6 | |
| parent | 686e68ef0287ac49b8fc1a035401a398e909cd94 (diff) | |
| download | barebox-c89da1684ec9886093213640e926c86a6e27bec1.tar.gz barebox-c89da1684ec9886093213640e926c86a6e27bec1.tar.xz | |
ARM: phytec-som-imx6: Add low cost variant for imx6dl phycore
The phyCORE-i.MX 6Solo/DualLight is available with low-cost and
full-featured phyBOARD-Mira. One crucial difference is the supported
max. ethernet speed. On the full-featured Mira it is 1000 MBit/s but on
the low-cost Mira it is only 100 MBit/s. To cover this difference two
different images are necessary for low-cost and full-featured. Thus a
low-cost variant is added for the phyCORE-i.MX 6Solo with NAND and the
phyCORE-i.MX 6 DualLight with eMMC.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/phytec-som-imx6')
| -rw-r--r-- | arch/arm/boards/phytec-som-imx6/lowlevel.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 915534ea94..0f8d591b3a 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -109,8 +109,10 @@ PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb_1bank, imx6dl_phytec_phyboard_sub PHYTEC_ENTRY(start_phytec_phyboard_subra_1gib_1bank, imx6q_phytec_phyboard_subra, SZ_1G, false); PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_256mb, imx6dl_phytec_phycore_som_nand, SZ_256M, true); +PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_lc_nand_256mb, imx6dl_phytec_phycore_som_lc_nand, SZ_256M, true); PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_1gib, imx6dl_phytec_phycore_som_nand, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_emmc_1gib, imx6dl_phytec_phycore_som_emmc, SZ_1G, true); +PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_lc_emmc_1gib, imx6dl_phytec_phycore_som_lc_emmc, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_nand_1gib, imx6q_phytec_phycore_som_nand, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_som_nand, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_emmc_1gib, imx6q_phytec_phycore_som_emmc, SZ_1G, true); |