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| author | Stefan Christ <s.christ@phytec.de> | 2016-04-25 13:36:46 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-04-16 09:58:08 +0200 |
| commit | f9541b27817ee7425d6b38a0ee4e5b042daf1d8f (patch) | |
| tree | 0b5cbcf1510e132f6df56cca35a1e68f1fdca930 /arch/arm/boards/phytec-som-imx6 | |
| parent | bf0c6874d5b40de9b9e8501173f429573490c6fd (diff) | |
| download | barebox-f9541b27817ee7425d6b38a0ee4e5b042daf1d8f.tar.gz barebox-f9541b27817ee7425d6b38a0ee4e5b042daf1d8f.tar.xz | |
ARM: i.MX: phytec-som-imx6: add phyCORE-i.MX6 Solo with 1GiB RAM
Add Phytec phyCORE-i.MX6 Solo:
- imx6dl-phytec-phycore-som-nand:
- 1GiB RAM on 1 Bank with 32Bit
- 100Mbit Ethernet
- NAND
- SD
- UART
Signed-off-by: Stefan Christ <s.christ@phytec.de>
Signed-off-by: Christian Hemp <c.hemp@phytec.de>
Diffstat (limited to 'arch/arm/boards/phytec-som-imx6')
| -rw-r--r-- | arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg | 8 | ||||
| -rw-r--r-- | arch/arm/boards/phytec-som-imx6/lowlevel.c | 1 |
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg new file mode 100644 index 0000000000..bf95d0f6ae --- /dev/null +++ b/arch/arm/boards/phytec-som-imx6/flash-header-phytec-pcm058dl-1gib-32bit.imxcfg @@ -0,0 +1,8 @@ +#define SETUP_MDCFG0 \ + wm 32 0x021b000c 0x8c929b85 + +#define SETUP_MDASP_MDCTL \ + wm 32 0x021b0040 0x00000027; \ + wm 32 0x021b0000 0x84190000 + +#include "flash-header-phytec-pcm058dl.h" diff --git a/arch/arm/boards/phytec-som-imx6/lowlevel.c b/arch/arm/boards/phytec-som-imx6/lowlevel.c index 9aa2104a3c..f9d70c7450 100644 --- a/arch/arm/boards/phytec-som-imx6/lowlevel.c +++ b/arch/arm/boards/phytec-som-imx6/lowlevel.c @@ -107,6 +107,7 @@ PHYTEC_ENTRY(start_phytec_phyboard_subra_512mb_1bank, imx6dl_phytec_phyboard_sub PHYTEC_ENTRY(start_phytec_phyboard_subra_1gib_1bank, imx6q_phytec_phyboard_subra, SZ_1G, false); PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_256mb, imx6dl_phytec_phycore_som_nand, SZ_256M, true); +PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_nand_1gib, imx6dl_phytec_phycore_som_nand, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6dl_som_emmc_1gib, imx6dl_phytec_phycore_som_emmc, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6q_som_nand_1gib, imx6q_phytec_phycore_som_nand, SZ_1G, true); PHYTEC_ENTRY(start_phytec_phycore_imx6qp_som_nand_1gib, imx6qp_phytec_phycore_som_nand, SZ_1G, true); |