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author | Steffen Trumtrar <s.trumtrar@pengutronix.de> | 2018-07-31 12:44:32 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-08-08 09:21:48 +0200 |
commit | 4418dd99704afe1392f7873c5f30cf264414b123 (patch) | |
tree | e70550a016bec5ab499269a4c4421b256bc9eaeb /arch/arm/boards/reflex-achilles | |
parent | 98152c31407a97d5fda8eeb00aade6c93495a11b (diff) | |
download | barebox-4418dd99704afe1392f7873c5f30cf264414b123.tar.gz barebox-4418dd99704afe1392f7873c5f30cf264414b123.tar.xz |
ARM: socfpga: arria10-init: split pinsetup
Move the setup of the shared- and fpgapins to its own function.
These pins can only be configured and let out of reset after the FPGA has been
programmed.
Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/reflex-achilles')
-rw-r--r-- | arch/arm/boards/reflex-achilles/lowlevel.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c b/arch/arm/boards/reflex-achilles/lowlevel.c index fe57518cbb..4c18fa6bca 100644 --- a/arch/arm/boards/reflex-achilles/lowlevel.c +++ b/arch/arm/boards/reflex-achilles/lowlevel.c @@ -26,6 +26,7 @@ static noinline void achilles_entry(void) setup_c(); arria10_init(&mainpll_cfg, &perpll_cfg, pinmux); + arria10_finish_io(&mainpll_cfg, &perpll_cfg, pinmux); arria10_ddr_calibration_sequence(); |