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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-02-28 09:34:39 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-03-06 14:10:44 +0100 |
| commit | ac1404f77491a577223a29a5b51677caa46bf778 (patch) | |
| tree | af68ecb835d00266e03b22c8ee4e9a08625407d0 /arch/arm/boards/reflex-achilles | |
| parent | 9ab62dc0eb05d64acca50d8b6bcae35bcd553739 (diff) | |
| download | barebox-ac1404f77491a577223a29a5b51677caa46bf778.tar.gz barebox-ac1404f77491a577223a29a5b51677caa46bf778.tar.xz | |
ARM: socfpga: Move mach header files to include/mach/socfpga
Currently arch specific headers can be included with
longer possible as there won't be a single mach anymore.
Move all socfpga specific header files to include/mach/socfpga/ to
prepare for multi-arch support.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/boards/reflex-achilles')
| -rw-r--r-- | arch/arm/boards/reflex-achilles/board.c | 2 | ||||
| -rw-r--r-- | arch/arm/boards/reflex-achilles/lowlevel.c | 16 | ||||
| -rw-r--r-- | arch/arm/boards/reflex-achilles/pinmux-config-arria10.c | 2 | ||||
| -rw-r--r-- | arch/arm/boards/reflex-achilles/pll-config-arria10.c | 2 |
4 files changed, 11 insertions, 11 deletions
diff --git a/arch/arm/boards/reflex-achilles/board.c b/arch/arm/boards/reflex-achilles/board.c index 0fbb967ff9..96da18f22e 100644 --- a/arch/arm/boards/reflex-achilles/board.c +++ b/arch/arm/boards/reflex-achilles/board.c @@ -4,7 +4,7 @@ #include <init.h> #include <io.h> #include <bbu.h> -#include <mach/arria10-system-manager.h> +#include <mach/socfpga/arria10-system-manager.h> static int achilles_init(void) { diff --git a/arch/arm/boards/reflex-achilles/lowlevel.c b/arch/arm/boards/reflex-achilles/lowlevel.c index 511b41fd01..12ead6d6dd 100644 --- a/arch/arm/boards/reflex-achilles/lowlevel.c +++ b/arch/arm/boards/reflex-achilles/lowlevel.c @@ -10,16 +10,16 @@ #include <asm/unaligned.h> #include <debug_ll.h> #include <pbl.h> -#include <mach/arria10-sdram.h> -#include <mach/arria10-regs.h> -#include <mach/arria10-reset-manager.h> -#include <mach/arria10-clock-manager.h> -#include <mach/arria10-pinmux.h> -#include <mach/arria10-fpga.h> -#include <mach/init.h> +#include <mach/socfpga/arria10-sdram.h> +#include <mach/socfpga/arria10-regs.h> +#include <mach/socfpga/arria10-reset-manager.h> +#include <mach/socfpga/arria10-clock-manager.h> +#include <mach/socfpga/arria10-pinmux.h> +#include <mach/socfpga/arria10-fpga.h> +#include <mach/socfpga/init.h> #include "pll-config-arria10.c" #include "pinmux-config-arria10.c" -#include <mach/generic.h> +#include <mach/socfpga/generic.h> #define BAREBOX_PART 0 #define BITSTREAM_PART 1 diff --git a/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c b/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c index 146bb5405d..aa65770fdd 100644 --- a/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c +++ b/arch/arm/boards/reflex-achilles/pinmux-config-arria10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only -#include <mach/arria10-pinmux.h> +#include <mach/socfpga/arria10-pinmux.h> static uint32_t pinmux[] = { [arria10_pinmux_shared_io_q4_12] = 8, diff --git a/arch/arm/boards/reflex-achilles/pll-config-arria10.c b/arch/arm/boards/reflex-achilles/pll-config-arria10.c index 27dbe01b58..35d475bcfb 100644 --- a/arch/arm/boards/reflex-achilles/pll-config-arria10.c +++ b/arch/arm/boards/reflex-achilles/pll-config-arria10.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0-only -#include <mach/arria10-clock-manager.h> +#include <mach/socfpga/arria10-clock-manager.h> static struct arria10_mainpll_cfg mainpll_cfg = { .cntr15clk_cnt = 900, |