ARM: i.MX: Add SoC namespace to imx7/8m CCM defines

The CCM defines used on i.MX7 and i.MX8M do not have any SoC namespace.
Add it to make clear where they are supposed to be used. Since it looks
confusing to call i.MX7 specific defines on i.MX8M and vice versa,
duplicate them for both SoCs.

Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

5 files changed, 30 insertions, 30 deletions

diff --git a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
index edd965e4ec..995bf6cca9 100644
--- a/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
+++ b/arch/arm/boards/freescale-mx7-sabresd/lowlevel.c
@@ -17,12 +17,12 @@ static inline void setup_uart(void)
 {
 	void __iomem *ccm   = IOMEM(MX7_CCM_BASE_ADDR);
 
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
-	writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__OSC_24M,
-	       ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART1));
+	writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART1_CLK_ROOT__OSC_24M,
+	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART1_CLK_ROOT));
+	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART1));
 
 	imx7_setup_pad(MX7D_PAD_UART1_TX_DATA__UART1_DCE_TX);
 
diff --git a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
index a501f03722..0f4b27a9af 100644
--- a/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
+++ b/arch/arm/boards/nxp-imx8mq-evk/lowlevel.c
@@ -27,12 +27,12 @@ static void setup_uart(void)
 {
 	void __iomem *ccm   = IOMEM(MX8MQ_CCM_BASE_ADDR);
 
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
-	writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__25M_REF_CLK,
-	       ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+	writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX8M_CCM_CCGRn_CLR(IMX8M_CCM_CCGR_UART1));
+	writel(IMX8M_CCM_TARGET_ROOTn_ENABLE | IMX8M_UART1_CLK_ROOT__25M_REF_CLK,
+	       ccm + IMX8M_CCM_TARGET_ROOTn(IMX8M_UART1_CLK_ROOT));
+	writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_UART1));
 
 	imx8mq_setup_pad(IMX8MQ_PAD_UART1_TXD__UART1_TX | UART_PAD_CTRL);
 
diff --git a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
index f14366a27b..0abe0a6bc2 100644
--- a/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
+++ b/arch/arm/boards/phytec-som-imx8mq/lowlevel.c
@@ -30,12 +30,12 @@ static void setup_uart(void)
 {
 	void __iomem *ccm   = IOMEM(MX8MQ_CCM_BASE_ADDR);
 
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
-	writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__25M_REF_CLK,
-	       ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+	writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX8M_CCM_CCGRn_CLR(IMX8M_CCM_CCGR_UART1));
+	writel(IMX8M_CCM_TARGET_ROOTn_ENABLE | IMX8M_UART1_CLK_ROOT__25M_REF_CLK,
+	       ccm + IMX8M_CCM_TARGET_ROOTn(IMX8M_UART1_CLK_ROOT));
+	writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_UART1));
 
 	imx8mq_setup_pad(IMX8MQ_PAD_UART1_TXD__UART1_TX | UART_PAD_CTRL);
 
diff --git a/arch/arm/boards/zii-imx7d-dev/lowlevel.c b/arch/arm/boards/zii-imx7d-dev/lowlevel.c
index 83d01446b9..83fb646fd6 100644
--- a/arch/arm/boards/zii-imx7d-dev/lowlevel.c
+++ b/arch/arm/boards/zii-imx7d-dev/lowlevel.c
@@ -25,12 +25,12 @@ static inline void setup_uart(void)
 {
 	void __iomem *ccm   = IOMEM(MX7_CCM_BASE_ADDR);
 
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_CLR(CCM_CCGR_UART2));
-	writel(CCM_TARGET_ROOTn_ENABLE | UART2_CLK_ROOT__OSC_24M,
-	       ccm + CCM_TARGET_ROOTn(UART2_CLK_ROOT));
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_SET(CCM_CCGR_UART2));
+	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX7_CCM_CCGRn_CLR(IMX7_CCM_CCGR_UART2));
+	writel(IMX7_CCM_TARGET_ROOTn_ENABLE | IMX7_UART2_CLK_ROOT__OSC_24M,
+	       ccm + IMX7_CCM_TARGET_ROOTn(IMX7_UART2_CLK_ROOT));
+	writel(IMX7_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX7_CCM_CCGRn_SET(IMX7_CCM_CCGR_UART2));
 
 	imx7_setup_pad(MX7D_PAD_UART2_TX_DATA__UART2_DCE_TX);
 
diff --git a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
index 482d70cb01..0bb141fbf2 100644
--- a/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
+++ b/arch/arm/boards/zii-imx8mq-dev/lowlevel.c
@@ -29,12 +29,12 @@ static void setup_uart(void)
 {
 	void __iomem *ccm   = IOMEM(MX8MQ_CCM_BASE_ADDR);
 
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_CLR(CCM_CCGR_UART1));
-	writel(CCM_TARGET_ROOTn_ENABLE | UART1_CLK_ROOT__25M_REF_CLK,
-	       ccm + CCM_TARGET_ROOTn(UART1_CLK_ROOT));
-	writel(CCM_CCGR_SETTINGn_NEEDED(0),
-	       ccm + CCM_CCGRn_SET(CCM_CCGR_UART1));
+	writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX8M_CCM_CCGRn_CLR(IMX8M_CCM_CCGR_UART1));
+	writel(IMX8M_CCM_TARGET_ROOTn_ENABLE | IMX8M_UART1_CLK_ROOT__25M_REF_CLK,
+	       ccm + IMX8M_CCM_TARGET_ROOTn(IMX8M_UART1_CLK_ROOT));
+	writel(IMX8M_CCM_CCGR_SETTINGn_NEEDED(0),
+	       ccm + IMX8M_CCM_CCGRn_SET(IMX8M_CCM_CCGR_UART1));
 
 	imx8mq_setup_pad(IMX8MQ_PAD_UART1_TXD__UART1_TX | UART_PAD_CTRL);