ARM: stm32: add support for PHYTEC phyCORE stm32mp1

Import DT[1] and add the boilerplate to have barebox generate a SSBL
for the board.

[1]: git://git.phytec.de/tf-a-stm32mp

Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de>
Signed-off-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220302160242.2997946-1-a.fatoum@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

4 files changed, 51 insertions, 0 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index 8557e1dca8..75e15cbda4 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -101,6 +101,7 @@ obj-$(CONFIG_MACH_PCM049)			+= phytec-phycore-omap4460/
 obj-$(CONFIG_MACH_PHYTEC_SOM_AM335X)		+= phytec-som-am335x/
 obj-$(CONFIG_MACH_PHYTEC_SOM_IMX6)		+= phytec-som-imx6/
 obj-$(CONFIG_MACH_PHYTEC_PHYCORE_IMX7)		+= phytec-phycore-imx7/
+obj-$(CONFIG_MACH_PHYTEC_PHYCORE_STM32MP1)	+= phytec-phycore-stm32mp1/
 obj-$(CONFIG_MACH_PHYTEC_SOM_IMX8MQ)		+= phytec-som-imx8mq/
 obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_AX3)	+= plathome-openblocks-ax3/
 obj-$(CONFIG_MACH_PLATHOME_OPENBLOCKS_A6)	+= plathome-openblocks-a6/
diff --git a/arch/arm/boards/phytec-phycore-stm32mp1/Makefile b/arch/arm/boards/phytec-phycore-stm32mp1/Makefile
new file mode 100644
index 0000000000..1d052d28c9
--- /dev/null
+++ b/arch/arm/boards/phytec-phycore-stm32mp1/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0-only
+lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/phytec-phycore-stm32mp1/board.c b/arch/arm/boards/phytec-phycore-stm32mp1/board.c
new file mode 100644
index 0000000000..eb6147785f
--- /dev/null
+++ b/arch/arm/boards/phytec-phycore-stm32mp1/board.c
@@ -0,0 +1,28 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+#include <common.h>
+#include <driver.h>
+#include <bootsource.h>
+
+static int phycore_stm32mp1_probe(struct device_d *dev)
+{
+	if (bootsource_get_instance() == 0)
+		of_device_enable_path("/chosen/environment-sd");
+	else
+		of_device_enable_path("/chosen/environment-emmc");
+
+	barebox_set_hostname("phyCORE-STM32MP1");
+
+	return 0;
+}
+
+static const struct of_device_id phycore_stm32mp1_of_match[] = {
+	{ .compatible = "phytec,phycore-stm32mp1-3" },
+	{ /* sentinel */ },
+};
+
+static struct driver_d phycore_stm32mp1_board_driver = {
+	.name = "board-phycore-stm32mp1",
+	.probe = phycore_stm32mp1_probe,
+	.of_compatible = phycore_stm32mp1_of_match,
+};
+device_platform_driver(phycore_stm32mp1_board_driver);
diff --git a/arch/arm/boards/phytec-phycore-stm32mp1/lowlevel.c b/arch/arm/boards/phytec-phycore-stm32mp1/lowlevel.c
new file mode 100644
index 0000000000..f76bad86a1
--- /dev/null
+++ b/arch/arm/boards/phytec-phycore-stm32mp1/lowlevel.c
@@ -0,0 +1,19 @@
+// SPDX-License-Identifier: GPL-2.0+
+#include <common.h>
+#include <mach/entry.h>
+#include <debug_ll.h>
+
+extern char __dtb_z_stm32mp157c_phycore_stm32mp1_3_start[];
+
+ENTRY_FUNCTION(start_phycore_stm32mp1_3, r0, r1, r2)
+{
+	void *fdt;
+
+	stm32mp_cpu_lowlevel_init();
+
+	putc_ll('>');
+
+	fdt = __dtb_z_stm32mp157c_phycore_stm32mp1_3_start + get_runtime_offset();
+
+	stm32mp1_barebox_entry(fdt);
+}