arm: boards: Add support for PRTT1x STM32MP151 based boards

- PRTT1A is a very simple 10Base-T1L Ethernet to 0-10V output converter
  module.
- PRTT1S is a CO2- and RH measurement module with 10Base-T1L and PoDL power
  sink.
- PRTT1C is a "white box switch" device, meant to control the other members
  of the PRTT1L family of devices, connected via 10Base-T1L and PoDL power.

Signed-off-by: David Jander <david@protonic.nl>
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Link: https://lore.barebox.org/20211118134125.408959-1-o.rempel@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

4 files changed, 188 insertions, 0 deletions

diff --git a/arch/arm/boards/Makefile b/arch/arm/boards/Makefile
index a841053c20..b3d4917709 100644
--- a/arch/arm/boards/Makefile
+++ b/arch/arm/boards/Makefile
@@ -107,6 +107,7 @@ obj-$(CONFIG_MACH_PM9263)			+= pm9263/
 obj-$(CONFIG_MACH_PM9G45)			+= pm9g45/
 obj-$(CONFIG_MACH_PROTONIC_IMX6)		+= protonic-imx6/
 obj-$(CONFIG_MACH_PROTONIC_IMX8M)		+= protonic-imx8m/
+obj-$(CONFIG_MACH_PROTONIC_STM32MP1)		+= protonic-stm32mp1/
 obj-$(CONFIG_MACH_QIL_A9260)			+= qil-a926x/
 obj-$(CONFIG_MACH_QIL_A9G20)			+= qil-a926x/
 obj-$(CONFIG_MACH_RADXA_ROCK)			+= radxa-rock/
diff --git a/arch/arm/boards/protonic-stm32mp1/Makefile b/arch/arm/boards/protonic-stm32mp1/Makefile
new file mode 100644
index 0000000000..092c31d6b2
--- /dev/null
+++ b/arch/arm/boards/protonic-stm32mp1/Makefile
@@ -0,0 +1,2 @@
+lwl-y += lowlevel.o
+obj-y += board.o
diff --git a/arch/arm/boards/protonic-stm32mp1/board.c b/arch/arm/boards/protonic-stm32mp1/board.c
new file mode 100644
index 0000000000..84a3d8eabc
--- /dev/null
+++ b/arch/arm/boards/protonic-stm32mp1/board.c
@@ -0,0 +1,127 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-FileCopyrightText: 2021 David Jander, Protonic Holland
+// SPDX-FileCopyrightText: 2021 Oleksij Rempel, Pengutronix
+
+#include <bootsource.h>
+#include <common.h>
+#include <init.h>
+#include <mach/bbu.h>
+#include <of_device.h>
+
+/* board specific flags */
+#define PRT_STM32_BOOTSRC_SD		BIT(2)
+#define PRT_STM32_BOOTSRC_EMMC		BIT(1)
+#define PRT_STM32_BOOTSRC_SPI_NOR	BIT(0)
+
+struct prt_stm32_machine_data {
+	u32 flags;
+};
+
+struct prt_stm32_boot_dev {
+	char *name;
+	char *env;
+	char *dev;
+	int flags;
+	int boot_idx;
+	enum bootsource boot_src;
+};
+
+static const struct prt_stm32_boot_dev prt_stm32_boot_devs[] = {
+	{
+		.name = "emmc",
+		.env = "/chosen/environment-emmc",
+		.dev = "/dev/mmc1.ssbl",
+		.flags = PRT_STM32_BOOTSRC_EMMC,
+		.boot_src = BOOTSOURCE_MMC,
+		.boot_idx = 1,
+	}, {
+		.name = "qspi",
+		.env = "/chosen/environment-qspi",
+		.dev = "/dev/flash.ssbl",
+		.flags = PRT_STM32_BOOTSRC_SPI_NOR,
+		.boot_src = BOOTSOURCE_SPI_NOR,
+		.boot_idx = -1,
+	}, {
+		/* SD is optional boot source and should be last device in the
+		 * list. */
+		.name = "sd",
+		.env = "/chosen/environment-sd",
+		.dev = "/dev/mmc0.ssbl",
+		.flags = PRT_STM32_BOOTSRC_SD,
+		.boot_src = BOOTSOURCE_MMC,
+		.boot_idx = 0,
+	},
+};
+
+static int prt_stm32_probe(struct device_d *dev)
+{
+	const struct prt_stm32_machine_data *dcfg;
+	char *env_path_back = NULL, *env_path = NULL;
+	int ret, i;
+
+	dcfg = of_device_get_match_data(dev);
+	if (!dcfg) {
+		ret = -EINVAL;
+		goto exit_get_dcfg;
+	}
+
+	for (i = 0; i < ARRAY_SIZE(prt_stm32_boot_devs); i++) {
+		const struct prt_stm32_boot_dev *bd = &prt_stm32_boot_devs[i];
+		int bbu_flags = 0;
+
+		/* skip not supported boot sources */
+		if (!(bd->flags & dcfg->flags))
+			continue;
+
+		/* first device is build-in device */
+		if (!env_path_back)
+			env_path_back = bd->env;
+
+		if (bd->boot_src == bootsource_get() && (bd->boot_idx == -1 ||
+		    bd->boot_idx  == bootsource_get_instance())) {
+			bbu_flags = BBU_HANDLER_FLAG_DEFAULT;
+			env_path = bd->env;
+		}
+
+		ret = stm32mp_bbu_mmc_register_handler(bd->name, bd->dev,
+						       bbu_flags);
+		if (ret < 0)
+			dev_warn(dev, "Failed to enable %s bbu (%pe)\n",
+				 bd->name, ERR_PTR(ret));
+	}
+
+	if (!env_path)
+		env_path = env_path_back;
+	ret = of_device_enable_path(env_path);
+	if (ret < 0)
+		dev_warn(dev, "Failed to enable environment partition '%s' (%pe)\n",
+			 env_path, ERR_PTR(ret));
+
+	return 0;
+
+exit_get_dcfg:
+	dev_err(dev, "Failed to get dcfg: %pe\n", ERR_PTR(ret));
+	return ret;
+}
+
+static const struct prt_stm32_machine_data prt_stm32_prtt1a = {
+	.flags = PRT_STM32_BOOTSRC_SD | PRT_STM32_BOOTSRC_SPI_NOR,
+};
+
+static const struct prt_stm32_machine_data prt_stm32_prtt1c = {
+	.flags = PRT_STM32_BOOTSRC_SD | PRT_STM32_BOOTSRC_EMMC,
+};
+
+static const struct of_device_id prt_stm32_of_match[] = {
+	{ .compatible = "prt,prtt1a", .data = &prt_stm32_prtt1a },
+	{ .compatible = "prt,prtt1c", .data = &prt_stm32_prtt1c },
+	{ .compatible = "prt,prtt1s", .data = &prt_stm32_prtt1a },
+	{ /* sentinel */ },
+};
+
+static struct driver_d prt_stm32_board_driver = {
+	.name = "board-protonic-stm32",
+	.probe = prt_stm32_probe,
+	.of_compatible = prt_stm32_of_match,
+};
+postcore_platform_driver(prt_stm32_board_driver);
diff --git a/arch/arm/boards/protonic-stm32mp1/lowlevel.c b/arch/arm/boards/protonic-stm32mp1/lowlevel.c
new file mode 100644
index 0000000000..583f72dfe7
--- /dev/null
+++ b/arch/arm/boards/protonic-stm32mp1/lowlevel.c
@@ -0,0 +1,58 @@
+// SPDX-License-Identifier: GPL-2.0-or-later
+// SPDX-FileCopyrightText: 2021 David Jander, Protonic Holland
+
+#include <common.h>
+#include <debug_ll.h>
+#include <mach/entry.h>
+
+extern char __dtb_z_stm32mp151_prtt1a_start[];
+extern char __dtb_z_stm32mp151_prtt1c_start[];
+extern char __dtb_z_stm32mp151_prtt1s_start[];
+
+static void setup_uart(void)
+{
+	/* first stage has set up the UART, so nothing to do here */
+	putc_ll('>');
+}
+
+ENTRY_FUNCTION(start_prtt1a, r0, r1, r2)
+{
+	void *fdt;
+
+	stm32mp_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_z_stm32mp151_prtt1a_start + get_runtime_offset();
+
+	stm32mp1_barebox_entry(fdt);
+}
+
+ENTRY_FUNCTION(start_prtt1c, r0, r1, r2)
+{
+	void *fdt;
+
+	stm32mp_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_z_stm32mp151_prtt1c_start + get_runtime_offset();
+
+	stm32mp1_barebox_entry(fdt);
+}
+
+ENTRY_FUNCTION(start_prtt1s, r0, r1, r2)
+{
+	void *fdt;
+
+	stm32mp_cpu_lowlevel_init();
+
+	if (IS_ENABLED(CONFIG_DEBUG_LL))
+		setup_uart();
+
+	fdt = __dtb_z_stm32mp151_prtt1s_start + get_runtime_offset();
+
+	stm32mp1_barebox_entry(fdt);
+}