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authorSascha Hauer <s.hauer@pengutronix.de>2021-07-18 07:12:50 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2021-07-18 07:12:50 +0200
commitf09309b37e085fc5b6310ed4a73426778b000e17 (patch)
treea2719f1c40bdb17a6ff20e510c5541e176e42f66 /arch/arm/boards
parent568f177dcf6fad50fde492540537e483e0110909 (diff)
parent1034f50397c675733f37dff06dbe16c7d2ff89d7 (diff)
downloadbarebox-f09309b37e085fc5b6310ed4a73426778b000e17.tar.gz
barebox-f09309b37e085fc5b6310ed4a73426778b000e17.tar.xz
Merge branch 'for-next/deep-probe'
Diffstat (limited to 'arch/arm/boards')
-rw-r--r--arch/arm/boards/embest-marsboard/board.c44
-rw-r--r--arch/arm/boards/freescale-mx6-sabrelite/board.c58
-rw-r--r--arch/arm/boards/phytec-som-imx6/board.c159
3 files changed, 180 insertions, 81 deletions
diff --git a/arch/arm/boards/embest-marsboard/board.c b/arch/arm/boards/embest-marsboard/board.c
index 66893434c2..a11b7b6579 100644
--- a/arch/arm/boards/embest-marsboard/board.c
+++ b/arch/arm/boards/embest-marsboard/board.c
@@ -10,6 +10,7 @@
#include <envfs.h>
#include <mach/bbu.h>
#include <linux/phy.h>
+#include <deep-probe.h>
static int ar8035_phy_fixup(struct phy_device *dev)
{
@@ -18,37 +19,22 @@ static int ar8035_phy_fixup(struct phy_device *dev)
/* Ar803x phy SmartEEE feature cause link status generates glitch,
* which cause ethernet link down/up issue, so disable SmartEEE
*/
- phy_write(dev, 0xd, 0x3);
- phy_write(dev, 0xe, 0x805d);
- phy_write(dev, 0xd, 0x4003);
+ val = phy_read_mmd_indirect(dev, 0x805d, 0x3);
+ phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
- val = phy_read(dev, 0xe);
- phy_write(dev, 0xe, val & ~(1 << 8));
+ val = phy_read_mmd_indirect(dev, 0x4003, 0x3);
+ phy_write(dev, MII_MMD_DATA, val & ~(1 << 8));
- /* To enable AR8031 ouput a 125MHz clk from CLK_25M */
- phy_write(dev, 0xd, 0x7);
- phy_write(dev, 0xe, 0x8016);
- phy_write(dev, 0xd, 0x4007);
-
- val = phy_read(dev, 0xe);
+ val = phy_read_mmd_indirect(dev, 0x4007, 0x3);
val &= 0xffe3;
val |= 0x18;
- phy_write(dev, 0xe, val);
-
- /* introduce tx clock delay */
- phy_write(dev, 0x1d, 0x5);
- val = phy_read(dev, 0x1e);
- val |= 0x0100;
- phy_write(dev, 0x1e, val);
+ phy_write(dev, MII_MMD_DATA, val);
return 0;
}
-static int marsboard_device_init(void)
+static int marsboard_device_init(struct device_d *dev)
{
- if (!of_machine_is_compatible("embest,imx6q-marsboard"))
- return 0;
-
barebox_set_hostname("marsboard");
phy_register_fixup_for_uid(0x004dd072, 0xffffffef, ar8035_phy_fixup);
@@ -60,4 +46,16 @@ static int marsboard_device_init(void)
return 0;
}
-device_initcall(marsboard_device_init);
+
+static const struct of_device_id marsboard_of_match[] = {
+ { .compatible = "embest,imx6q-marsboard" },
+ { /* sentinel */ },
+};
+BAREBOX_DEEP_PROBE_ENABLE(marsboard_of_match);
+
+static struct driver_d marsboard_driver = {
+ .name = "board-mars",
+ .probe = marsboard_device_init,
+ .of_compatible = marsboard_of_match,
+};
+postcore_platform_driver(marsboard_driver);
diff --git a/arch/arm/boards/freescale-mx6-sabrelite/board.c b/arch/arm/boards/freescale-mx6-sabrelite/board.c
index 1b39ef82c6..f6eac4c0f3 100644
--- a/arch/arm/boards/freescale-mx6-sabrelite/board.c
+++ b/arch/arm/boards/freescale-mx6-sabrelite/board.c
@@ -13,7 +13,9 @@
#include <mach/bbu.h>
#include <asm/armlinux.h>
#include <generated/mach-types.h>
+#include <of.h>
#include <partition.h>
+#include <deep-probe.h>
#include <linux/phy.h>
#include <asm/io.h>
#include <asm/mmu.h>
@@ -98,10 +100,6 @@ static int sabrelite_ksz9021rn_setup(void)
{
int ret;
- if (!of_machine_is_compatible("fsl,imx6q-sabrelite") &&
- !of_machine_is_compatible("fsl,imx6dl-sabrelite"))
- return 0;
-
mxc_iomux_v3_setup_multiple_pads(sabrelite_enet_gpio_pads,
ARRAY_SIZE(sabrelite_enet_gpio_pads));
@@ -118,11 +116,6 @@ static int sabrelite_ksz9021rn_setup(void)
return 0;
}
-/*
- * Do this before the fec initializes but after our
- * gpios are available.
- */
-fs_initcall(sabrelite_ksz9021rn_setup);
static void sabrelite_ehci_init(void)
{
@@ -132,11 +125,22 @@ static void sabrelite_ehci_init(void)
gpio_set_value(IMX_GPIO_NR(7, 12), 1);
}
-static int sabrelite_devices_init(void)
+static int sabrelite_probe(struct device_d *dev)
{
- if (!of_machine_is_compatible("fsl,imx6q-sabrelite") &&
- !of_machine_is_compatible("fsl,imx6dl-sabrelite"))
- return 0;
+ int ret;
+
+ phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
+ ksz9021rn_phy_fixup);
+
+ barebox_set_hostname("sabrelite");
+
+ ret = of_devices_ensure_probed_by_property("gpio-controller");
+ if (ret)
+ return ret;
+
+ ret = sabrelite_ksz9021rn_setup();
+ if (ret)
+ return ret;
sabrelite_ehci_init();
@@ -147,19 +151,21 @@ static int sabrelite_devices_init(void)
return 0;
}
-device_initcall(sabrelite_devices_init);
-
-static int sabrelite_coredevices_init(void)
-{
- if (!of_machine_is_compatible("fsl,imx6q-sabrelite") &&
- !of_machine_is_compatible("fsl,imx6dl-sabrelite"))
- return 0;
+static const struct of_device_id sabrelite_match[] = {
+ {
+ .compatible = "fsl,imx6q-sabrelite",
+ }, {
+ .compatible = "fsl,imx6dl-sabrelite",
+ },
+ { /* Sentinel */ },
+};
- phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
- ksz9021rn_phy_fixup);
+static struct driver_d sabrelite_driver = {
+ .name = "physom-imx6",
+ .probe = sabrelite_probe,
+ .of_compatible = sabrelite_match,
+};
- barebox_set_hostname("sabrelite");
+postcore_platform_driver(sabrelite_driver);
- return 0;
-}
-coredevice_initcall(sabrelite_coredevices_init);
+BAREBOX_DEEP_PROBE_ENABLE(sabrelite_match);
diff --git a/arch/arm/boards/phytec-som-imx6/board.c b/arch/arm/boards/phytec-som-imx6/board.c
index bac3e8a8a1..1e515a093a 100644
--- a/arch/arm/boards/phytec-som-imx6/board.c
+++ b/arch/arm/boards/phytec-som-imx6/board.c
@@ -14,6 +14,7 @@
#include <gpio.h>
#include <init.h>
#include <of.h>
+#include <deep-probe.h>
#include <i2c/i2c.h>
#include <mach/bbu.h>
#include <platform_data/eth-fec.h>
@@ -110,6 +111,10 @@ static int phycore_da9062_setup_buck_mode(void)
if (!pmic_np)
return -ENODEV;
+ ret = of_device_ensure_probed(pmic_np);
+ if (ret)
+ return ret;
+
adapter = of_find_i2c_adapter_by_node(pmic_np->parent);
if (!adapter)
return -ENODEV;
@@ -141,15 +146,29 @@ err_out:
return ret;
}
-static int physom_imx6_devices_init(void)
+#define IS_PHYFLEX BIT(0)
+#define IS_PHYCORE BIT(1)
+#define IS_PHYCARD BIT(2)
+#define IS_PHYCORE_UL BIT(3)
+#define HAS_MMC3 BIT(4)
+#define HAS_MMC1 BIT(5)
+
+struct board_data {
+ unsigned flags;
+};
+
+static int physom_imx6_probe(struct device_d *dev)
{
int ret;
char *environment_path, *default_environment_path;
char *envdev, *default_envdev;
+ const struct board_data *brd = device_get_match_data(dev);
+ unsigned flags = brd->flags;
- if (of_machine_is_compatible("phytec,imx6q-pfla02")
- || of_machine_is_compatible("phytec,imx6dl-pfla02")
- || of_machine_is_compatible("phytec,imx6s-pfla02")) {
+ if (flags & IS_PHYFLEX) {
+ ret = of_devices_ensure_probed_by_property("gpio-controller");
+ if (ret)
+ return ret;
phyflex_err006282_workaround();
@@ -164,21 +183,14 @@ static int physom_imx6_devices_init(void)
imx6_bbu_internal_mmc_register_handler("mmc2",
"/dev/mmc2", 0);
- } else if (of_machine_is_compatible("phytec,imx6q-pcaaxl3")) {
-
+ } else if (flags & IS_PHYCARD) {
barebox_set_hostname("phyCARD-i.MX6");
default_environment_path = "/chosen/environment-nand";
default_envdev = "NAND flash";
imx6_bbu_internal_mmc_register_handler("mmc2",
"/dev/mmc2", 0);
-
- } else if (of_machine_is_compatible("phytec,imx6q-pcm058-nand")
- || of_machine_is_compatible("phytec,imx6q-pcm058-emmc")
- || of_machine_is_compatible("phytec,imx6dl-pcm058-nand")
- || of_machine_is_compatible("phytec,imx6qp-pcm058-nand")
- || of_machine_is_compatible("phytec,imx6dl-pcm058-emmc")) {
-
+ } else if (flags & IS_PHYCORE) {
if (phycore_da9062_setup_buck_mode())
pr_err("Setting PMIC BUCK mode failed\n");
@@ -189,8 +201,7 @@ static int physom_imx6_devices_init(void)
imx6_bbu_internal_mmc_register_handler("mmc0",
"/dev/mmc0", 0);
- } else if (of_machine_is_compatible("phytec,imx6ul-pcl063-nand")
- || of_machine_is_compatible("phytec,imx6ul-pcl063-emmc")) {
+ } else if (flags & IS_PHYCORE_UL) {
barebox_set_hostname("phyCORE-i.MX6UL");
default_environment_path = "/chosen/environment-nand";
default_envdev = "NAND flash";
@@ -201,8 +212,9 @@ static int physom_imx6_devices_init(void)
imx6_bbu_internal_mmc_register_handler("mmc0",
"/dev/mmc0", 0);
- } else
- return 0;
+ } else {
+ return -EINVAL;
+ }
switch (bootsource_get()) {
case BOOTSOURCE_MMC:
@@ -234,14 +246,13 @@ static int physom_imx6_devices_init(void)
pr_notice("Using environment in %s\n", envdev);
- if (of_machine_is_compatible("phytec,imx6q-pcm058-emmc")
- || of_machine_is_compatible("phytec,imx6dl-pcm058-emmc")) {
+ if (flags & HAS_MMC3) {
imx6_bbu_internal_mmc_register_handler("mmc3",
"/dev/mmc3",
BBU_HANDLER_FLAG_DEFAULT);
imx6_bbu_internal_mmcboot_register_handler("mmc3-boot",
"mmc3", 0);
- } else if (of_machine_is_compatible("phytec,imx6ul-pcl063-emmc")) {
+ } else if (flags & HAS_MMC1) {
imx6_bbu_internal_mmc_register_handler("mmc1",
"/dev/mmc1",
BBU_HANDLER_FLAG_DEFAULT);
@@ -254,23 +265,107 @@ static int physom_imx6_devices_init(void)
defaultenv_append_directory(defaultenv_physom_imx6);
/* Overwrite file /env/init/automount */
- if (of_machine_is_compatible("phytec,imx6q-pfla02")
- || of_machine_is_compatible("phytec,imx6dl-pfla02")
- || of_machine_is_compatible("phytec,imx6s-pfla02")
- || of_machine_is_compatible("phytec,imx6q-pcaaxl3")) {
+ if (flags & IS_PHYCARD || flags & IS_PHYFLEX) {
defaultenv_append_directory(defaultenv_physom_imx6);
- } else if (of_machine_is_compatible("phytec,imx6qp-pcm058-nand")
- || of_machine_is_compatible("phytec,imx6q-pcm058-nand")
- || of_machine_is_compatible("phytec,imx6q-pcm058-emmc")
- || of_machine_is_compatible("phytec,imx6dl-pcm058-nand")
- || of_machine_is_compatible("phytec,imx6dl-pcm058-emmc")) {
+ } else if (flags & IS_PHYCORE) {
defaultenv_append_directory(defaultenv_physom_imx6);
defaultenv_append_directory(defaultenv_physom_imx6_phycore);
- } else if (of_machine_is_compatible("phytec,imx6ul-pcl063-nand")
- || of_machine_is_compatible("phytec,imx6ul-pcl063-emmc")) {
+ } else if (flags & IS_PHYCORE_UL) {
defaultenv_append_directory(defaultenv_physom_imx6ul_phycore);
}
return 0;
}
-device_initcall(physom_imx6_devices_init);
+
+static struct board_data imx6q_pfla02 = {
+ .flags = IS_PHYFLEX,
+};
+
+static struct board_data imx6dl_pfla02 = {
+ .flags = IS_PHYFLEX,
+};
+
+static struct board_data imx6s_pfla02 = {
+ .flags = IS_PHYFLEX,
+};
+
+static struct board_data imx6q_pcaaxl3 = {
+ .flags = IS_PHYCARD,
+};
+
+static struct board_data imx6q_pcm058_nand = {
+ .flags = IS_PHYCORE,
+};
+
+static struct board_data imx6q_pcm058_emmc = {
+ .flags = IS_PHYCORE | HAS_MMC3,
+};
+
+static struct board_data imx6dl_pcm058_nand = {
+ .flags = IS_PHYCORE,
+};
+
+static struct board_data imx6qp_pcm058_nand = {
+ .flags = IS_PHYCORE,
+};
+
+static struct board_data imx6dl_pcm058_emmc = {
+ .flags = IS_PHYCORE | HAS_MMC3,
+};
+
+static struct board_data imx6ul_pcl063_nand = {
+ .flags = IS_PHYCORE_UL,
+};
+
+static struct board_data imx6ul_pcl063_emmc = {
+ .flags = IS_PHYCORE_UL | HAS_MMC1,
+};
+
+
+static const struct of_device_id physom_imx6_match[] = {
+ {
+ .compatible = "phytec,imx6q-pfla02",
+ .data = &imx6q_pfla02,
+ }, {
+ .compatible = "phytec,imx6dl-pfla02",
+ .data = &imx6dl_pfla02,
+ }, {
+ .compatible = "phytec,imx6s-pfla02",
+ .data = &imx6s_pfla02,
+ }, {
+ .compatible = "phytec,imx6q-pcaaxl3",
+ .data = &imx6q_pcaaxl3,
+ }, {
+ .compatible = "phytec,imx6q-pcm058-nand",
+ .data = &imx6q_pcm058_nand,
+ }, {
+ .compatible = "phytec,imx6q-pcm058-emmc",
+ .data = &imx6q_pcm058_emmc,
+ }, {
+ .compatible = "phytec,imx6dl-pcm058-nand",
+ .data = &imx6dl_pcm058_nand,
+ }, {
+ .compatible = "phytec,imx6qp-pcm058-nand",
+ .data = &imx6qp_pcm058_nand,
+ }, {
+ .compatible = "phytec,imx6dl-pcm058-emmc",
+ .data = &imx6dl_pcm058_emmc,
+ }, {
+ .compatible = "phytec,imx6ul-pcl063-nand",
+ .data = &imx6ul_pcl063_nand,
+ }, {
+ .compatible = "phytec,imx6ul-pcl063-emmc",
+ .data = &imx6ul_pcl063_emmc,
+ },
+ { /* Sentinel */ },
+};
+
+static struct driver_d physom_imx6_driver = {
+ .name = "physom-imx6",
+ .probe = physom_imx6_probe,
+ .of_compatible = physom_imx6_match,
+};
+
+postcore_platform_driver(physom_imx6_driver);
+
+BAREBOX_DEEP_PROBE_ENABLE(physom_imx6_match);