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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-04-13 17:24:51 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-05-23 22:28:11 +0200 |
| commit | 023e9f01c742614cc15ce1ce7038a4e1bebf2eab (patch) | |
| tree | b721fb1d968e850dc0930ac5af63adb6f8f30432 /arch/arm/cpu/cache-armv4.S | |
| parent | 2c2f657092781381e9e04fac9e08e6dac034d5bc (diff) | |
| download | barebox-023e9f01c742614cc15ce1ce7038a4e1bebf2eab.tar.gz barebox-023e9f01c742614cc15ce1ce7038a4e1bebf2eab.tar.xz | |
ARM startup: Do call __mmu_cache_flush during startup
Traditionally we call __mmu_cache_flush in early startup. There
is a problem with armv7 and hierarchical caches though, on these
systems __mmu_cache_flush uses the stack. Appearantly this was
seldomly a problem, because most of these systems have a ROM
bootloader which sets up some stack, but on a special i.MX6 system
this failed badly. We should not have to flush caches here. Every
sane system should pass control to the bootloader without stale
entries in the caches *), so it should be a safe assumption that the
cache flush can be removed.
Since __mmu_cache_flush is not called from early code anymore we can
also move it to the regular text section.
Be brave and give it a try.
*) omap3 seems to be a exception to this, but this has a cache flush
in arch_init_lowlevel already
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu/cache-armv4.S')
| -rw-r--r-- | arch/arm/cpu/cache-armv4.S | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/arch/arm/cpu/cache-armv4.S b/arch/arm/cpu/cache-armv4.S index fc53653c34..6d03565c58 100644 --- a/arch/arm/cpu/cache-armv4.S +++ b/arch/arm/cpu/cache-armv4.S @@ -42,7 +42,6 @@ ENTRY(__mmu_cache_off) mov pc, lr ENDPROC(__mmu_cache_off) -__BARE_INIT ENTRY(__mmu_cache_flush) mrc p15, 0, r6, c0, c0 @ get processor ID mov r2, #64*1024 @ default: 32K dcache size (*2) |