diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-03-08 21:00:02 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-03-21 12:23:03 +0100 |
| commit | 44eaf1dd75a4626bed924422914f6f1593be697a (patch) | |
| tree | 11fcaf2265772daae6dc7ef15354d1bda3c937ab /arch/arm/cpu/cache-armv8.S | |
| parent | 9738c67932f72083074e15f77ca803ec3f0b2b16 (diff) | |
| download | barebox-44eaf1dd75a4626bed924422914f6f1593be697a.tar.gz barebox-44eaf1dd75a4626bed924422914f6f1593be697a.tar.xz | |
ARM: aarch64: cache: Add v8_inv_dcache_range
implement v8_flush_dcache_range based on v8_inv_dcache_range. While
at it add a prototype for v8_inv_dcache_range.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu/cache-armv8.S')
| -rw-r--r-- | arch/arm/cpu/cache-armv8.S | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/arch/arm/cpu/cache-armv8.S b/arch/arm/cpu/cache-armv8.S index 82b2f81778..3e21b35913 100644 --- a/arch/arm/cpu/cache-armv8.S +++ b/arch/arm/cpu/cache-armv8.S @@ -148,6 +148,25 @@ ENTRY(v8_flush_dcache_range) ret ENDPROC(v8_flush_dcache_range) +.section .text.v8_inv_dcache_range +ENTRY(v8_inv_dcache_range) + mrs x3, ctr_el0 + lsr x3, x3, #16 + and x3, x3, #0xf + mov x2, #4 + lsl x2, x2, x3 /* cache line size */ + + /* x2 <- minimal cache line size in cache system */ + sub x3, x2, #1 + bic x0, x0, x3 +1: dc ivac, x0 /* invalidate data or unified cache */ + add x0, x0, x2 + cmp x0, x1 + b.lo 1b + dsb sy + ret +ENDPROC(v8_inv_dcache_range) + /* * void v8_invalidate_icache_all(void) * |