ARM: i.MX: fixed enabling the MMU after switching in non secure mode.

The Domain Access Control Register (DACR) in CP15 is banked between
secure and non secure mode: there a copy of the reg. in secure mode and a
second copy in non secure mode.
As barebox boots on the imx7 SOC it runs in secure mode and initializes
the secure-mode copy of DACR (with 0x00000001).
After switching to non secure mode, for example with the command 'smc -n'
or while booting a kernel image with global.bootm.secure_state=nonsecure,
the active value of DACR is the copy in non-secure mode and that copy
was still uninitialized and in an UNKNOWN state.

This caused the cpu to hang as soon as the MMU was enabled in non-secure
mode.

We fix this by reading the DACR value in secure mode just before switching
to non secure and then initializing it again with the same value.

Signed-off-by: Giorgio Dal Molin <giorgio.nicole@arcor.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>

1 files changed, 9 insertions, 0 deletions

diff --git a/arch/arm/cpu/mmu.h b/arch/arm/cpu/mmu.h
index 6e7a4c0350..c85e0ea050 100644
--- a/arch/arm/cpu/mmu.h
+++ b/arch/arm/cpu/mmu.h
@@ -39,6 +39,15 @@ static inline void set_ttbr(void *ttb)
 #define DOMAIN_CLIENT	1
 #define DOMAIN_MANAGER	3
 
+static inline unsigned long get_domain(void)
+{
+	unsigned long dacr;
+
+	asm volatile ("mrc p15, 0, %0, c3, c0, 0" : "=r"(dacr));
+
+	return dacr;
+}
+
 static inline void set_domain(unsigned val)
 {
 	/* Set the Domain Access Control Register */