diff options
| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2018-06-07 06:00:56 -0700 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-06-08 08:37:38 +0200 |
| commit | 49d8e09fd6fa76952980c8f7c075d71bfcefb097 (patch) | |
| tree | c4332d86baf59e0f22e6ccb9b8b152e0105254d9 /arch/arm/cpu | |
| parent | 0018a6e5ad05712ef28ee28a22a2a6a5c36daf16 (diff) | |
| download | barebox-49d8e09fd6fa76952980c8f7c075d71bfcefb097.tar.gz barebox-49d8e09fd6fa76952980c8f7c075d71bfcefb097.tar.xz | |
ARM: mmu: Make use of dsb() and isb() helpers
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/mmu_64.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/cpu/mmu_64.h b/arch/arm/cpu/mmu_64.h index c280d2ced2..2cbe720625 100644 --- a/arch/arm/cpu/mmu_64.h +++ b/arch/arm/cpu/mmu_64.h @@ -28,7 +28,7 @@ static inline void tlb_invalidate(void) static inline void set_ttbr_tcr_mair(int el, uint64_t table, uint64_t tcr, uint64_t attr) { - asm volatile("dsb sy"); + dsb(); if (el == 1) { asm volatile("msr ttbr0_el1, %0" : : "r" (table) : "memory"); asm volatile("msr tcr_el1, %0" : : "r" (tcr) : "memory"); @@ -44,7 +44,7 @@ static inline void set_ttbr_tcr_mair(int el, uint64_t table, uint64_t tcr, uint6 } else { hang(); } - asm volatile("isb"); + isb(); } static inline uint64_t get_ttbr(int el) |