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| author | Andrey Smirnov <andrew.smirnov@gmail.com> | 2019-01-17 16:38:22 -0800 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-01-21 10:34:06 +0100 |
| commit | 581a73db8cae2b9e770c61ddb9cb0f27fdd2c423 (patch) | |
| tree | 3eb4836a080c4dc61451633da85d7a427429dfcd /arch/arm/cpu | |
| parent | 9f7cbfaa0d0bed3bbe9f72a739141e32339ce5f8 (diff) | |
| download | barebox-581a73db8cae2b9e770c61ddb9cb0f27fdd2c423.tar.gz barebox-581a73db8cae2b9e770c61ddb9cb0f27fdd2c423.tar.xz | |
ARM64: mmu: Invalidate memory before remapping as DMA coherent
Although there are known problems caused by this, it seems prudent to
invalidate the region of memory we are about remap as
uncached. Additionaliy this matches how dma_alloc_coherent() is
implemented on ARM.
Reviewed-by: Sam Ravnborg <sam@ravnborg.org>
Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/mmu_64.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index a7186eda44..1ee6a3b8c3 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -248,6 +248,14 @@ void mmu_disable(void) isb(); } +static void dma_inv_range(void *ptr, size_t size) +{ + unsigned long start = (unsigned long)ptr; + unsigned long end = start + size - 1; + + v8_inv_dcache_range(start, end); +} + void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle) { void *ret; @@ -257,6 +265,8 @@ void *dma_alloc_coherent(size_t size, dma_addr_t *dma_handle) if (dma_handle) *dma_handle = (dma_addr_t)ret; + dma_inv_range(ret, size); + arch_remap_range(ret, size, MAP_UNCACHED); return ret; |