diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2023-11-20 15:44:52 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-11-21 14:58:29 +0100 |
| commit | b9884b2947b8eba660e189e9a1bedc1b37aced88 (patch) | |
| tree | 592ff9bf82c1cca70e793acd02f8ef470860d513 /arch/arm/cpu | |
| parent | 442a823537f6a10e08c145a19883d83370f48088 (diff) | |
| download | barebox-b9884b2947b8eba660e189e9a1bedc1b37aced88.tar.gz barebox-b9884b2947b8eba660e189e9a1bedc1b37aced88.tar.xz | |
ARM: mmu64: setup ttb for EL2 as well
The TF-A is often started before the MMU is initialized. There are some
exceptions though. On Layerscape the TF-A (or: PPA in that case) is
started while the MMU is running. The PPA is then executed in EL3 and
returns in EL2. For this case setup the TTB for EL2 as well so that we
have a valid MMU setup when the PPA returns.
Link: https://lore.barebox.org/20231120144453.1075740-1-s.hauer@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/cpu')
| -rw-r--r-- | arch/arm/cpu/mmu_64.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/cpu/mmu_64.c b/arch/arm/cpu/mmu_64.c index b718cb1efa..716e717c72 100644 --- a/arch/arm/cpu/mmu_64.c +++ b/arch/arm/cpu/mmu_64.c @@ -297,6 +297,8 @@ void mmu_early_enable(unsigned long membase, unsigned long memsize) el = current_el(); set_ttbr_tcr_mair(el, ttb, calc_tcr(el, BITS_PER_VA), MEMORY_ATTRIBUTES); + if (el == 3) + set_ttbr_tcr_mair(2, ttb, calc_tcr(2, BITS_PER_VA), MEMORY_ATTRIBUTES); memset((void *)ttb, 0, GRANULE_SIZE); |