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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-08-06 11:43:38 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-08-06 15:38:40 +0200 |
| commit | 11dcfd13b9aa5ae8e72f0807825131af79a071d0 (patch) | |
| tree | 401fb473e48728df4e00984da79549af820458c4 /arch/arm/dts/imx6q-sabrelite.dts | |
| parent | 15ee30138f59eac95379a4b94c538c1fcc338ed5 (diff) | |
| download | barebox-11dcfd13b9aa5ae8e72f0807825131af79a071d0.tar.gz barebox-11dcfd13b9aa5ae8e72f0807825131af79a071d0.tar.xz | |
ARM: dts: imx: share pad macro names between imx6q and imx6dl
Based on the same commit in the Kernel:
| commit 828b1716459d00b3d57d4309d25a8d1ea241116a
| Author: Shawn Guo <shawn.guo@linaro.org>
| Date: Thu Jul 11 13:58:36 2013 +0800
|
| ARM: dts: imx: share pad macro names between imx6q and imx6dl
|
| The imx6q and imx6dl are two pin-to-pin compatible SoCs. The same board
| design can work with either chip plugged into the socket, e.g. sabresd
| and sabreauto boards.
|
| We currently define pin groups in imx6q.dtsi and imx6dl.dtsi
| respectively because the pad macro names are different between two
| chips. This brings a maintenance burden on having the same label point
| to the same pin group defined in two places.
|
| The patch replaces prefix MX6Q_ and MX6DL_ with MX6QDL_ for both SoCs
| pad macro names. Then the pin groups becomes completely common between
| imx6q and imx6dl and can just be moved into imx6qdl.dtsi, so that the
| long term maintenance of imx6q/dt pin settings becomes easier.
|
| Unfortunately, the change brings some dramatic diff stat, but it's all
| about DTS file, and the ultimate net diff stat is good.
|
| Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts/imx6q-sabrelite.dts')
| -rw-r--r-- | arch/arm/dts/imx6q-sabrelite.dts | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/dts/imx6q-sabrelite.dts b/arch/arm/dts/imx6q-sabrelite.dts index e1e967d401..9f822206b5 100644 --- a/arch/arm/dts/imx6q-sabrelite.dts +++ b/arch/arm/dts/imx6q-sabrelite.dts @@ -95,14 +95,14 @@ hog { pinctrl_hog: hoggrp { fsl,pins = < - MX6Q_PAD_NANDF_D6__GPIO2_IO06 0x80000000 - MX6Q_PAD_NANDF_D7__GPIO2_IO07 0x80000000 - MX6Q_PAD_EIM_D19__GPIO3_IO19 0x80000000 - MX6Q_PAD_EIM_D22__GPIO3_IO22 0x80000000 - MX6Q_PAD_EIM_D23__GPIO3_IO23 0x80000000 - MX6Q_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 - MX6Q_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 - MX6Q_PAD_GPIO_0__CCM_CLKO1 0x80000000 + MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x80000000 + MX6QDL_PAD_NANDF_D7__GPIO2_IO07 0x80000000 + MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000 + MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000 + MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 + MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 + MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 + MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000 >; }; }; |