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| author | Oleksij Rempel <linux@rempel-privat.de> | 2020-06-16 07:52:01 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2020-06-18 14:54:00 +0200 |
| commit | 20f7d3e06a9ff9126e369dc5b09dcd31e1a06c67 (patch) | |
| tree | 053f0a2786bc2b3f53a373757a4c4adc9ef4647d /arch/arm/dts/imx6q-vicut1.dts | |
| parent | 93651898a5d6a2ab5c0e947f759ea55e82564b54 (diff) | |
| download | barebox-20f7d3e06a9ff9126e369dc5b09dcd31e1a06c67.tar.gz barebox-20f7d3e06a9ff9126e369dc5b09dcd31e1a06c67.tar.xz | |
ARM: dts: imx6: add Protonic boards
This DTS will be replaced by kernel version
Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts/imx6q-vicut1.dts')
| -rw-r--r-- | arch/arm/dts/imx6q-vicut1.dts | 52 |
1 files changed, 52 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6q-vicut1.dts b/arch/arm/dts/imx6q-vicut1.dts new file mode 100644 index 0000000000..9f60ed1ac2 --- /dev/null +++ b/arch/arm/dts/imx6q-vicut1.dts @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright (c) 2014 Protonic Holland + */ + +/dts-v1/; +#include <arm/imx6q.dtsi> +#include "imx6qdl-vicut1.dtsi" + +/ { + model = "Kverneland UT1Q Board"; + compatible = "kvg,vicut1q", "fsl,imx6q"; + + memory { + reg = <0x10000000 0xf0000000>; + }; +}; + +&fec { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_enet>; + phy-mode = "rgmii"; + /* phy-reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>; */ + status = "okay"; +}; + +&iomuxc { + pinctrl_enet: enetgrp { + fsl,pins = < + /* MX6QDL_ENET_PINGRP_RGMII_MD(0x1b030, 0x10030) */ + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b030 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b030 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b030 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b030 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b030 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b030 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x10030 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x10030 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x10030 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x10030 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x10030 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x10030 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x10030 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x10030 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x10030 + + /* Phy reset */ + MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25 0x1b0b0 + MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28 0x1b0b1 + >; + }; +}; |