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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2013-07-10 14:24:20 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-07-11 09:53:16 +0200 |
| commit | 24bd4d0d6fc61eb434b1cd785d349e01c7d6c1a3 (patch) | |
| tree | 6853d5a00c06026e60ece88aa92334bd031eda96 /arch/arm/dts/imx6q.dtsi | |
| parent | 499012d2afa7a2dea5ea23ab3b80584e335ddc30 (diff) | |
| download | barebox-24bd4d0d6fc61eb434b1cd785d349e01c7d6c1a3.tar.gz barebox-24bd4d0d6fc61eb434b1cd785d349e01c7d6c1a3.tar.xz | |
ARM: dts: Add more pinctrl groups for i.MX6q
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts/imx6q.dtsi')
| -rw-r--r-- | arch/arm/dts/imx6q.dtsi | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/dts/imx6q.dtsi b/arch/arm/dts/imx6q.dtsi index 21e675848b..fa8dd43e04 100644 --- a/arch/arm/dts/imx6q.dtsi +++ b/arch/arm/dts/imx6q.dtsi @@ -104,6 +104,14 @@ MX6Q_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 >; }; + + pinctrl_ecspi1_2: ecspi1grp-2 { + fsl,pins = < + MX6Q_PAD_KEY_COL1__ECSPI1_MISO 0x100b1 + MX6Q_PAD_KEY_ROW0__ECSPI1_MOSI 0x100b1 + MX6Q_PAD_KEY_COL0__ECSPI1_SCLK 0x100b1 + >; + }; }; ecspi3 { @@ -157,6 +165,27 @@ MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 >; }; + + pinctrl_enet_3: enetgrp-3 { + fsl,pins = < + MX6Q_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6Q_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6Q_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0 + MX6Q_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0 + MX6Q_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0 + MX6Q_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0 + MX6Q_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0 + MX6Q_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0 + MX6Q_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 + MX6Q_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0 + MX6Q_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0 + MX6Q_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0 + MX6Q_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0 + MX6Q_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0 + MX6Q_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0 + MX6Q_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0 + >; + }; }; gpmi-nand { @@ -192,6 +221,13 @@ MX6Q_PAD_EIM_D28__I2C1_SDA 0x4001b8b1 >; }; + + pinctrl_i2c1_2: i2c1grp-2 { + fsl,pins = < + MX6Q_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6Q_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; + }; }; i2c2 { @@ -268,6 +304,17 @@ MX6Q_PAD_NANDF_D7__SD2_DATA7 0x17059 >; }; + + pinctrl_usdhc2_2: usdhc2grp-2 { + fsl,pins = < + MX6Q_PAD_SD2_CMD__SD2_CMD 0x17059 + MX6Q_PAD_SD2_CLK__SD2_CLK 0x10059 + MX6Q_PAD_SD2_DAT0__SD2_DATA0 0x17059 + MX6Q_PAD_SD2_DAT1__SD2_DATA1 0x17059 + MX6Q_PAD_SD2_DAT2__SD2_DATA2 0x17059 + MX6Q_PAD_SD2_DAT3__SD2_DATA3 0x17059 + >; + }; }; usdhc3 { |