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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-05-09 10:01:10 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-05-19 08:37:19 +0200 |
| commit | a5207a633a054adbd3cbf104436492f0bc57b104 (patch) | |
| tree | f18feba1597b80f64327e3e7f87dc4273b0a9a2e /arch/arm/dts/imx6qdl-tqma6x.dtsi | |
| parent | eeb3cd13691b913cd9176a46a658eb2b1413b6a5 (diff) | |
| download | barebox-a5207a633a054adbd3cbf104436492f0bc57b104.tar.gz barebox-a5207a633a054adbd3cbf104436492f0bc57b104.tar.xz | |
ARM: dts: i.MX6: drop usage of pin group defines
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts/imx6qdl-tqma6x.dtsi')
| -rw-r--r-- | arch/arm/dts/imx6qdl-tqma6x.dtsi | 48 |
1 files changed, 43 insertions, 5 deletions
diff --git a/arch/arm/dts/imx6qdl-tqma6x.dtsi b/arch/arm/dts/imx6qdl-tqma6x.dtsi index fc13c35f53..f0b1a0db75 100644 --- a/arch/arm/dts/imx6qdl-tqma6x.dtsi +++ b/arch/arm/dts/imx6qdl-tqma6x.dtsi @@ -32,23 +32,61 @@ &iomuxc { imx6qdl-tqma6x { pinctrl_ecspi1: ecspi1grp { - fsl,pins = <MX6QDL_ECSPI1_PINGRP1>; + fsl,pins = < + MX6QDL_PAD_EIM_D17__ECSPI1_MISO 0x100b1 + MX6QDL_PAD_EIM_D18__ECSPI1_MOSI 0x100b1 + MX6QDL_PAD_EIM_D16__ECSPI1_SCLK 0x100b1 + >; }; pinctrl_enet: enetgrp { - fsl,pins = <MX6QDL_ENET_PINGRP1>; + fsl,pins = < + MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x100b1 + MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x100b1 + MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x100b1 + MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x100b1 + MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x100b1 + MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x100b1 + MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x100b1 + MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x100b1 + MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x100b1 + MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x100b1 + MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x100b1 + MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x100b1 + MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x100b1 + MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 + MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 + MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8 + >; }; pinctrl_i2c1: i2c1grp { - fsl,pins = <MX6QDL_I2C1_PINGRP2>; + fsl,pins = < + MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1 + MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1 + >; }; pinctrl_i2c3: i2c3grp { - fsl,pins = <MX6QDL_I2C3_PINGRP2>; + fsl,pins = < + MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1 + MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1 + >; }; pinctrl_usdhc3: usdhc3grp { - fsl,pins = <MX6QDL_USDHC3_PINGRP_D8>; + fsl,pins = < + MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17059 + MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10059 + MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17059 + MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17059 + MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17059 + MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17059 + MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059 + MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059 + MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059 + MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059 + >; }; }; }; |