diff options
| author | Alexander Shiyan <shc_work@mail.ru> | 2021-01-25 13:00:47 +0300 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2021-01-25 11:10:23 +0100 |
| commit | 7ff8141ee1b2028a7d21a50de85ee7666db028e3 (patch) | |
| tree | 0c907bb23d78cf285d41a1a1e1905c9e868642bb /arch/arm/dts | |
| parent | 6699c1709db1e4f9079b37ad514a1a8833989489 (diff) | |
| download | barebox-7ff8141ee1b2028a7d21a50de85ee7666db028e3.tar.gz barebox-7ff8141ee1b2028a7d21a50de85ee7666db028e3.tar.xz | |
ARM: dts: imx6qdl: pfla02: Use NAND pinmux entries from upstream
The gpminand pinmux entries are in the upstream dtsi now, so use them.
Signed-off-by: Alexander Shiyan <shc_work@mail.ru>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/imx6qdl-phytec-pfla02.dtsi | 24 |
1 files changed, 0 insertions, 24 deletions
diff --git a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi index f499ca5684..e1aa3183b3 100644 --- a/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi +++ b/arch/arm/dts/imx6qdl-phytec-pfla02.dtsi @@ -127,30 +127,6 @@ MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 >; }; - - pinctrl_gpmi_nand: gpminandgrp { - fsl,pins = < - MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1 - MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1 - MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1 - MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000 - MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1 - MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1 - MX6QDL_PAD_NANDF_CS2__NAND_CE2_B 0xb0b1 - MX6QDL_PAD_NANDF_CS3__NAND_CE3_B 0xb0b1 - MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1 - MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1 - MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1 - MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1 - MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1 - MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1 - MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1 - MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1 - MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1 - MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1 - MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1 - >; - }; }; }; |