diff options
| author | Sascha Hauer <s.hauer@pengutronix.de> | 2018-03-08 15:29:59 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2018-03-23 07:43:28 +0100 |
| commit | f707b5b3399afc94d7737990b34225a2f0edcc57 (patch) | |
| tree | b22eb5456aa0b6e0739a123fbe8728d91741be1a /arch/arm/include | |
| parent | 765d9df8577af918c9932b108ff701eb5910adbe (diff) | |
| download | barebox-f707b5b3399afc94d7737990b34225a2f0edcc57.tar.gz barebox-f707b5b3399afc94d7737990b34225a2f0edcc57.tar.xz | |
ARM: aarch64: mmu: Fix TCR setting
A BITS_PER_VA value of 33 is a little small. Increase it to 39 which is
the maximum size we can do with 3 level page tables. The TCR value
depends on the current exception level, so we have to calculate the
value during runtime. To do this use a function derived from U-Boots
get_tcr function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/pgtable64.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/include/asm/pgtable64.h b/arch/arm/include/asm/pgtable64.h index f2888c3ccd..d8382505d0 100644 --- a/arch/arm/include/asm/pgtable64.h +++ b/arch/arm/include/asm/pgtable64.h @@ -21,7 +21,7 @@ #define UNUSED_DESC 0x6EbAAD0BBADbA6E0 #define VA_START 0x0 -#define BITS_PER_VA 33 +#define BITS_PER_VA 39 /* Granule size of 4KB is being used */ #define GRANULE_SIZE_SHIFT 12 @@ -116,6 +116,7 @@ #define TCR_EL1_IPS_BITS (UL(3) << 32) /* 42 bits physical address */ #define TCR_EL2_IPS_BITS (3 << 16) /* 42 bits physical address */ #define TCR_EL3_IPS_BITS (3 << 16) /* 42 bits physical address */ +#define TCR_EPD1_DISABLE (1 << 23) #define TCR_EL1_RSVD (1 << 31) #define TCR_EL2_RSVD (1 << 31 | 1 << 23) |