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| author | Marco Felsch <m.felsch@pengutronix.de> | 2023-10-17 16:51:16 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2023-10-18 10:07:44 +0200 |
| commit | 33e811708cc486577dd72cb4a8a2c242590ccdb0 (patch) | |
| tree | 013f9a381a1abd5a6253f6faa38418af1c83914d /arch/arm/lib/pbl.lds.S | |
| parent | 831bbf96754796436a5a62fa3dcdf358dbaa2b05 (diff) | |
| download | barebox-33e811708cc486577dd72cb4a8a2c242590ccdb0.tar.gz barebox-33e811708cc486577dd72cb4a8a2c242590ccdb0.tar.xz | |
ARM: lds: add support for a 2nd CSF area
Extend the CSF area to be able two store two CSF slots. The 2nd CSF slot
is required in case of FlexSPI HAB boot support. The first slot is used
for the MMC-IVT + barebox-pbl; the 2nd slot is used for the FlexSPI-IVT
+ barebox-pbl. This is necessary because of the fact that the HAB ROM
code requires that the IVT is signed as well.
Make the 2nd CSF slot optional since early SRAM space is limited and 4K
can make a difference here.
Please check the documentation for a more detailed information about the
i.MX8M image layout.
Signed-off-by: Marco Felsch <m.felsch@pengutronix.de>
Link: https://lore.barebox.org/20231017145131.3069283-15-m.felsch@pengutronix.de
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/lib/pbl.lds.S')
| -rw-r--r-- | arch/arm/lib/pbl.lds.S | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/lib/pbl.lds.S b/arch/arm/lib/pbl.lds.S index 898d6be33b..cafb27b2d5 100644 --- a/arch/arm/lib/pbl.lds.S +++ b/arch/arm/lib/pbl.lds.S @@ -12,7 +12,11 @@ #define BASE (TEXT_BASE - SZ_2M) #endif +#ifdef CONFIG_HABV4_QSPI +#define HAB_CSF_LEN 0x4000 +#else #define HAB_CSF_LEN 0x2000 +#endif OUTPUT_FORMAT(BAREBOX_OUTPUT_FORMAT) OUTPUT_ARCH(BAREBOX_OUTPUT_ARCH) |