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| author | Sam Ravnborg <sam@ravnborg.org> | 2022-06-28 22:38:46 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2022-06-30 14:18:55 +0200 |
| commit | 47d6b05305e5b899c1e0fb7d0a8ecd3be2e6a07e (patch) | |
| tree | abaea36b17c3c51d4b723f8a2c05d53c64388c7c /arch/arm/mach-at91/include/mach/sam92_ll.h | |
| parent | 8f8475ad1ba3dd3dfe6e55893456181e4eb2aa17 (diff) | |
| download | barebox-47d6b05305e5b899c1e0fb7d0a8ecd3be2e6a07e.tar.gz barebox-47d6b05305e5b899c1e0fb7d0a8ecd3be2e6a07e.tar.xz | |
ARM: at91: Add lowlevel helpers for at91sam9263
Add lowlevel helpers like we already have for sama5d2 etc.
Signed-off-by: Sam Ravnborg <sam@ravnborg.org>
Reviewed-by: Ahmad Fatoum <a.fatoum@pengutronix.de>
Link: https://lore.barebox.org/20220628203849.2785611-9-sam@ravnborg.org
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-at91/include/mach/sam92_ll.h')
| -rw-r--r-- | arch/arm/mach-at91/include/mach/sam92_ll.h | 54 |
1 files changed, 54 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/include/mach/sam92_ll.h b/arch/arm/mach-at91/include/mach/sam92_ll.h new file mode 100644 index 0000000000..f5cef197d3 --- /dev/null +++ b/arch/arm/mach-at91/include/mach/sam92_ll.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef __MACH_SAM92_LL_H__ +#define __MACH_SAM92_LL_H__ + +#include <debug_ll.h> +#include <common.h> + +#include <mach/at91_pmc_ll.h> +#include <mach/at91sam9260.h> +#include <mach/at91sam9261.h> +#include <mach/at91sam9263.h> +#include <mach/at91sam926x.h> +#include <mach/debug_ll.h> +#include <mach/early_udelay.h> +#include <mach/iomux.h> + +struct sam92_pmc_config { + unsigned int diva; + unsigned int mula; +}; + +void sam9263_lowlevel_init(const struct sam92_pmc_config *config); + +static inline void sam92_pmc_enable_periph_clock(int clk) +{ + at91_pmc_enable_periph_clock(IOMEM(AT91SAM926X_BASE_PMC), clk); +} + +/* requires relocation */ +static inline void sam92_udelay_init(unsigned int msc) +{ + early_udelay_init(IOMEM(AT91SAM926X_BASE_PMC), IOMEM(AT91SAM9263_BASE_PIT), + AT91SAM926X_ID_SYS, msc, 0); +} + +static inline void sam92_dbgu_setup_ll(unsigned int mck) +{ + void __iomem *pio = IOMEM(AT91SAM9263_BASE_PIOC); + + // Setup clock for pio + sam92_pmc_enable_periph_clock(AT91SAM9263_ID_PIOCDE); + + // Setup DBGU uart + at91_mux_pio_pin(pio, pin_to_mask(AT91_PIN_PC30), AT91_MUX_PERIPH_A, GPIO_PULL_UP); // DRXD + at91_mux_pio_pin(pio, pin_to_mask(AT91_PIN_PC31), AT91_MUX_PERIPH_A, 0); // DTXD + + // Setup dbgu + at91_dbgu_setup_ll(IOMEM(AT91_BASE_DBGU1), mck, CONFIG_BAUDRATE); + pbl_set_putc(at91_dbgu_putc, IOMEM(AT91_BASE_DBGU1)); + putc_ll('#'); +} + +#endif |