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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-02-13 11:37:37 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-02-13 11:38:39 +0100 |
| commit | 54fc71251cc9bfb148b34757e7f882832ebed3c0 (patch) | |
| tree | 810546d454d8bc3f4c60febe8795deba10c63224 /arch/arm/mach-imx/imx53.c | |
| parent | 99d72d3033d4c502b1aa3b8709484fda71372768 (diff) | |
| download | barebox-54fc71251cc9bfb148b34757e7f882832ebed3c0.tar.gz barebox-54fc71251cc9bfb148b34757e7f882832ebed3c0.tar.xz | |
ARM i.MX5: Allow to pass cpu clock to lowlevel init
Some variants of the i.MX53 do not allow to run at 1GHz, so
pass a cpu frequency parameter to the lowlevel init function.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx/imx53.c')
| -rw-r--r-- | arch/arm/mach-imx/imx53.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/imx53.c b/arch/arm/mach-imx/imx53.c index 2fb18e7f13..4f7d1cbc00 100644 --- a/arch/arm/mach-imx/imx53.c +++ b/arch/arm/mach-imx/imx53.c @@ -47,11 +47,12 @@ static int imx53_init(void) coredevice_initcall(imx53_init); #define setup_pll_1000(base) imx5_setup_pll((base), 1000, ((10 << 4) + ((1 - 1) << 0)), (12 - 1), 5) +#define setup_pll_800(base) imx5_setup_pll((base), 800, ((8 << 4) + ((1 - 1) << 0)), (3 - 1), 1) #define setup_pll_400(base) imx5_setup_pll((base), 400, ((8 << 4) + ((2 - 1) << 0)), (3 - 1), 1) #define setup_pll_455(base) imx5_setup_pll((base), 455, ((9 << 4) + ((2 - 1) << 0)), (48 - 1), 23) #define setup_pll_216(base) imx5_setup_pll((base), 216, ((8 << 4) + ((2 - 1) << 0)), (1 - 1), 1) -void imx53_init_lowlevel(void) +void imx53_init_lowlevel(unsigned int cpufreq_mhz) { void __iomem *ccm = (void __iomem *)MX53_CCM_BASE_ADDR; u32 r; @@ -82,7 +83,11 @@ void imx53_init_lowlevel(void) /* Switch ARM to step clock */ writel(0x4, ccm + MX5_CCM_CCSR); - setup_pll_1000((void __iomem *)MX53_PLL1_BASE_ADDR); + if (cpufreq_mhz == 1000) + setup_pll_1000((void __iomem *)MX53_PLL1_BASE_ADDR); + else + setup_pll_800((void __iomem *)MX53_PLL1_BASE_ADDR); + setup_pll_400((void __iomem *)MX53_PLL3_BASE_ADDR); /* Switch peripheral to PLL3 */ |