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| author | Stefan Riedmueller <s.riedmueller@phytec.de> | 2019-07-04 10:18:49 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2019-07-08 09:18:14 +0200 |
| commit | 686e68ef0287ac49b8fc1a035401a398e909cd94 (patch) | |
| tree | 0e5d53e1d710ba0699b78d5cebc0b187eb1635a4 /arch/arm/mach-imx | |
| parent | 00f8c6aaa5623e17c4cd706eb8c6d8d985a78679 (diff) | |
| download | barebox-686e68ef0287ac49b8fc1a035401a398e909cd94.tar.gz barebox-686e68ef0287ac49b8fc1a035401a398e909cd94.tar.xz | |
ARM: mach-imx: imx6: Read and print the UID of i.MX6 SOCs
Read the unified ID of the i.MX 6 SOCs and print it in the boot log.
Signed-off-by: Stefan Riedmueller <s.riedmueller@phytec.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/imx6.c | 19 | ||||
| -rw-r--r-- | arch/arm/mach-imx/include/mach/imx6.h | 2 |
2 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/imx6.c b/arch/arm/mach-imx/imx6.c index e898be9ab5..0fdd9f082f 100644 --- a/arch/arm/mach-imx/imx6.c +++ b/arch/arm/mach-imx/imx6.c @@ -23,6 +23,7 @@ #include <mach/reset-reason.h> #include <mach/imx6-anadig.h> #include <mach/imx6-regs.h> +#include <mach/imx6-fusemap.h> #include <mach/usb.h> #include <asm/mmu.h> #include <asm/cache-l2x0.h> @@ -38,6 +39,9 @@ #define BM_CLPCR_COSC_PWRDOWN (0x1 << 11) #define BM_CLPCR_BYP_MMDC_CH1_LPM_HS (0x1 << 21) +#define MX6_OCOTP_CFG0 0x410 +#define MX6_OCOTP_CFG1 0x420 + static void imx6_init_lowlevel(void) { void __iomem *aips1 = (void *)MX6_AIPS1_ON_BASE_ADDR; @@ -186,17 +190,30 @@ int imx6_cpu_revision(void) return soc_revision; } +u64 imx6_uid(void) +{ + void __iomem *ocotpbase = IOMEM(MX6_OCOTP_BASE_ADDR); + u64 uid; + + uid = ((u64)readl(ocotpbase + MX6_OCOTP_CFG0) << 32); + uid |= (u64)readl(ocotpbase + MX6_OCOTP_CFG1); + + return uid; +} + int imx6_init(void) { const char *cputypestr; u32 mx6_silicon_revision; void __iomem *src = IOMEM(MX6_SRC_BASE_ADDR); + u64 mx6_uid; imx6_init_lowlevel(); imx6_boot_save_loc(); mx6_silicon_revision = imx6_cpu_revision(); + mx6_uid = imx6_uid(); switch (imx6_cpu_type()) { case IMX6_CPUTYPE_IMX6Q: @@ -236,6 +253,8 @@ int imx6_init(void) imx_set_silicon_revision(cputypestr, mx6_silicon_revision); imx_set_reset_reason(src + IMX_SRC_SRSR, imx_reset_reasons); + pr_info("%s unique ID: %llx\n", cputypestr, mx6_uid); + imx6_setup_ipu_qos(); imx6ul_enet_clk_init(); diff --git a/arch/arm/mach-imx/include/mach/imx6.h b/arch/arm/mach-imx/include/mach/imx6.h index 5701bd480c..f0d20833fd 100644 --- a/arch/arm/mach-imx/include/mach/imx6.h +++ b/arch/arm/mach-imx/include/mach/imx6.h @@ -124,4 +124,6 @@ static inline int __imx6_cpu_revision(void) int imx6_cpu_revision(void); +u64 imx6_uid(void); + #endif /* __MACH_IMX6_H */ |