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authorSascha Hauer <s.hauer@pengutronix.de>2024-01-09 17:15:08 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2024-01-10 08:24:01 +0100
commitcbe089c4658d3837829f9932862c862147fda598 (patch)
tree5ac4f73dee8407cc093fb5b185a8ca42e55c9bca /arch/arm/mach-layerscape/ls102xa_stream_id.c
parentb9608ae0d856059934df413ca34b7e4dfef67fc5 (diff)
downloadbarebox-cbe089c4658d3837829f9932862c862147fda598.tar.gz
barebox-cbe089c4658d3837829f9932862c862147fda598.tar.xz
ARM: Layerscape: consolidate initcalls into one
For Layerscape we have multiple initcalls in the arch directory. Consolidate these into one initcall which detects the SoC type once and calls the appropriate init functions. This makes it easier to add future init steps and also we reduce the number of string comparisons. For added value also cpu_is_ls10xx() functions are added which might become in handy later. Link: https://lore.barebox.org/20240109161527.3237581-3-s.hauer@pengutronix.de Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-layerscape/ls102xa_stream_id.c')
-rw-r--r--arch/arm/mach-layerscape/ls102xa_stream_id.c9
1 files changed, 2 insertions, 7 deletions
diff --git a/arch/arm/mach-layerscape/ls102xa_stream_id.c b/arch/arm/mach-layerscape/ls102xa_stream_id.c
index c47c463b48..fd9be35c1d 100644
--- a/arch/arm/mach-layerscape/ls102xa_stream_id.c
+++ b/arch/arm/mach-layerscape/ls102xa_stream_id.c
@@ -6,6 +6,7 @@
#include <common.h>
#include <asm/io.h>
#include <soc/fsl/immap_lsch2.h>
+#include <mach/layerscape/layerscape.h>
struct smmu_stream_id {
uint16_t offset;
@@ -43,13 +44,7 @@ ls102xa_config_smmu_stream_id(struct smmu_stream_id *id, uint32_t num)
}
}
-static int ls102xa_smmu_stream_id_init(void)
+void ls102xa_smmu_stream_id_init(void)
{
- if (!of_machine_is_compatible("fsl,ls1021a"))
- return 0;
-
ls102xa_config_smmu_stream_id(dev_stream_id, ARRAY_SIZE(dev_stream_id));
-
- return 0;
}
-mmu_initcall(ls102xa_smmu_stream_id_init);