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authorSteffen Trumtrar <s.trumtrar@pengutronix.de>2013-02-11 11:42:05 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2013-02-12 10:02:51 +0100
commit2ccd4510bd74d01ad20b276f0e2e51ced0c475a8 (patch)
treecd45744596802049bc050210a53f0fb79bccb58f /arch/arm/mach-mxs
parentc0ba0a64ae16bc9f722187acb0769bb48d674c5d (diff)
downloadbarebox-2ccd4510bd74d01ad20b276f0e2e51ced0c475a8.tar.gz
barebox-2ccd4510bd74d01ad20b276f0e2e51ced0c475a8.tar.xz
ARM i.MX28: change default watchdog reset method
The default setting for the imx28 watchdog is to do a power-off reset. If the SoC is only powered via battery, then the watchdog powers the chip down, though. According to the datasheet it should still be possible to execute a proper POR with battery power, but testing showed otherwise. When the watchdog power-off reset is disabled, a software reset is executed instead. This works with and without battery power. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-mxs')
-rw-r--r--arch/arm/mach-mxs/soc-imx28.c12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-mxs/soc-imx28.c b/arch/arm/mach-mxs/soc-imx28.c
index a181b759cb..a5f3d685d7 100644
--- a/arch/arm/mach-mxs/soc-imx28.c
+++ b/arch/arm/mach-mxs/soc-imx28.c
@@ -21,6 +21,7 @@
#define HW_CLKCTRL_RESET 0x1e0
# define HW_CLKCTRL_RESET_CHIP (1 << 1)
+#define HW_CLKCTRL_WDOG_POR_DISABLE (1 << 5)
/* Reset the full i.MX28 SoC via a chipset feature */
void __noreturn reset_cpu(unsigned long addr)
@@ -35,3 +36,14 @@ void __noreturn reset_cpu(unsigned long addr)
/*NOTREACHED*/
}
EXPORT_SYMBOL(reset_cpu);
+
+static int imx28_init(void)
+{
+ /*
+ * The default setting for the WDT is to do a POR. If the SoC is only
+ * powered via battery, then a WDT reset powers the chip down instead
+ * of resetting it. Use a software reset only.
+ */
+ writel(HW_CLKCTRL_WDOG_POR_DISABLE, IMX_CCM_BASE + HW_CLKCTRL_RESET);
+}
+postcore_initcall(imx28_init);