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authorSascha Hauer <s.hauer@pengutronix.de>2013-03-04 16:58:58 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2013-03-04 17:00:23 +0100
commitb7451329b5d2db6bb9d7cd13a29fcaeb1ac9c180 (patch)
tree014c6b16512690a327b110676d7794fdaec51767 /arch/arm/mach-omap/auxcr.S
parent94e71b843f6456abacc2fe76a5c375a461fabdf7 (diff)
downloadbarebox-b7451329b5d2db6bb9d7cd13a29fcaeb1ac9c180.tar.gz
barebox-b7451329b5d2db6bb9d7cd13a29fcaeb1ac9c180.tar.xz
ARM: OMAP3: invalidate L2 cache using ROM API
Code taken from U-Boot. This makes the beagle board much more reliable. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-omap/auxcr.S')
-rw-r--r--arch/arm/mach-omap/auxcr.S12
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/mach-omap/auxcr.S b/arch/arm/mach-omap/auxcr.S
index 2debc15bd6..aaac0f2130 100644
--- a/arch/arm/mach-omap/auxcr.S
+++ b/arch/arm/mach-omap/auxcr.S
@@ -31,3 +31,15 @@ ENTRY(setup_auxcr)
.word 0xE1600070 @ SMC
bx lr
ENDPROC(setup_auxcr)
+
+.arm
+ENTRY(omap3_gp_romcode_call)
+ push {r4-r12, lr} @ Save all registers from ROM code!
+ mov r12, r0 @ Copy the Service ID in R12
+ mov r0, r1 @ Copy parameter to R0
+ mcr p15, 0, r0, c7, c10, 4 @ DSB
+ mcr p15, 0, r0, c7, c10, 5 @ DMB
+ .word 0xe1600070 @ SMC #0 to enter monitor - hand assembled
+ @ because we use -march=armv5
+ pop {r4-r12, pc}
+ENDPROC(omap3_gp_romcode_call)