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| author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-12-08 17:51:05 +0100 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-12-08 17:51:25 +0100 |
| commit | 039a0e52f867c148b21d64eb08c0162cee86439d (patch) | |
| tree | 9db05c6c335b59cda1f917cdc881644d4a6b0603 /arch/arm/mach-omap/omap3_core.S | |
| parent | ab4e9edf86661635ab8f0aff14b178125bf80531 (diff) | |
| download | barebox-039a0e52f867c148b21d64eb08c0162cee86439d.tar.gz barebox-039a0e52f867c148b21d64eb08c0162cee86439d.tar.xz | |
ARM omap3: Call common_reset
omap3 has a soc specific reset function, make sure it calls common_reset
so that the proper CPU flags are set.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-omap/omap3_core.S')
| -rw-r--r-- | arch/arm/mach-omap/omap3_core.S | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-omap/omap3_core.S b/arch/arm/mach-omap/omap3_core.S index ea55efd2b6..38a8cb4c65 100644 --- a/arch/arm/mach-omap/omap3_core.S +++ b/arch/arm/mach-omap/omap3_core.S @@ -83,6 +83,7 @@ finished_inval: mcr p15, 2, r10, c0, c0, 0 /* select current cache level in cssr */ isb #endif /* CONFIG_CPU_V7_DCACHE_SKIP */ + common_reset r0 /* back to arch calling code */ b board_init_lowlevel_return ENDPROC(reset) |