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| author | Alexey Galakhov <agalakhov@gmail.com> | 2012-07-02 21:53:39 +0600 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-07-03 10:22:00 +0200 |
| commit | acca9e0c90e0725dfc8cc034997fe41ed27d9300 (patch) | |
| tree | a403fa8d57031fece0b7ec48e56cf6c4d1b4c583 /arch/arm/mach-samsung/include/mach | |
| parent | d04ce5dfe7d2a7502c9a77952164dd6a1e1666a4 (diff) | |
| download | barebox-acca9e0c90e0725dfc8cc034997fe41ed27d9300.tar.gz barebox-acca9e0c90e0725dfc8cc034997fe41ed27d9300.tar.xz | |
S5P DRAM support
Signed-off-by: Alexey Galakhov <agalakhov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-samsung/include/mach')
| -rw-r--r-- | arch/arm/mach-samsung/include/mach/s3c-generic.h | 6 | ||||
| -rw-r--r-- | arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h | 3 |
2 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/mach-samsung/include/mach/s3c-generic.h b/arch/arm/mach-samsung/include/mach/s3c-generic.h index 11b083d4a8..329c2b47f2 100644 --- a/arch/arm/mach-samsung/include/mach/s3c-generic.h +++ b/arch/arm/mach-samsung/include/mach/s3c-generic.h @@ -24,6 +24,8 @@ * MA 02111-1307 USA */ +#include <common.h> + uint32_t s3c_get_mpllclk(void); uint32_t s3c_get_upllclk(void); uint32_t s3c_get_fclk(void); @@ -40,4 +42,8 @@ void s3c24xx_disable_second_sdram_bank(void); #ifdef CONFIG_ARCH_S5PCxx void s5p_init_pll(void); +void s5p_init_dram_bank_lpddr(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16); +void s5p_init_dram_bank_lpddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16); +void s5p_init_dram_bank_ddr2(phys_addr_t base, uint32_t mc0, uint32_t mc1, int bus16); +uint32_t s5p_get_memory_size(void); #endif diff --git a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h index cb055272ff..248f868b1b 100644 --- a/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h +++ b/arch/arm/mach-samsung/include/mach/s5pcxx-iomap.h @@ -47,3 +47,6 @@ #define S3C_UART3_SIZE 0x400 #define S3C_UART_HAS_UBRDIVSLOT #define S3C_UART_HAS_UINTM + +#define S5P_DMC0_BASE 0xF0000000 +#define S5P_DMC1_BASE 0xF1400000 |