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authorLucas Stach <dev@lynxeye.de>2013-04-12 12:28:21 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-04-14 10:45:19 +0200
commite368a84a860b7e6ab07f829197d321c3583ed7ac (patch)
tree7f60fd5a63dc5b53b7c17ae70de60c6ce3a102e8 /arch/arm/mach-tegra/include
parent6be47ca3bd4465c4e9275c5af3f36ce55da6c216 (diff)
downloadbarebox-e368a84a860b7e6ab07f829197d321c3583ed7ac.tar.gz
barebox-e368a84a860b7e6ab07f829197d321c3583ed7ac.tar.xz
tegra: add T20 power management controller driver
Currently only implements system wide reset functionality. Signed-off-by: Lucas Stach <dev@lynxeye.de> Tested-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra/include')
-rw-r--r--arch/arm/mach-tegra/include/mach/tegra20-pmc.h37
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/include/mach/tegra20-pmc.h b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
new file mode 100644
index 0000000000..a905399862
--- /dev/null
+++ b/arch/arm/mach-tegra/include/mach/tegra20-pmc.h
@@ -0,0 +1,37 @@
+/*
+ * Copyright (C) 2013 Lucas Stach <l.stach@pengutronix.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+/* register definitions */
+#define PMC_CNTRL 0x000
+#define PMC_CNTRL_FUSE_OVERRIDE (1 << 18)
+#define PMC_CNTRL_INTR_POLARITY (1 << 17)
+#define PMC_CNTRL_CPUPWRREQ_OE (1 << 16)
+#define PMC_CNTRL_CPUPWRREQ_POLARITY (1 << 15)
+#define PMC_CNTRL_SIDE_EFFECT_LP0 (1 << 14)
+#define PMC_CNTRL_AOINIT (1 << 13)
+#define PMC_CNTRL_PWRGATE_DIS (1 << 12)
+#define PMC_CNTRL_SYSCLK_OE (1 << 11)
+#define PMC_CNTRL_SYSCLK_POLARITY (1 << 10)
+#define PMC_CNTRL_PWRREQ_OE (1 << 9)
+#define PMC_CNTRL_PWRREQ_POLARITY (1 << 8)
+#define PMC_CNTRL_BLINK_EN (1 << 7)
+#define PMC_CNTRL_GLITCHDET_DIS (1 << 6)
+#define PMC_CNTRL_LATCHWAKE_EN (1 << 5)
+#define PMC_CNTRL_MAIN_RST (1 << 4)
+#define PMC_CNTRL_KBC_RST (1 << 3)
+#define PMC_CNTRL_RTC_RST (1 << 2)
+#define PMC_CNTRL_RTC_CLK_DIS (1 << 1)
+#define PMC_CNTRL_KBC_CLK_DIS (1 << 0)