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authorLucas Stach <dev@lynxeye.de>2013-06-30 23:08:47 +0200
committerSascha Hauer <s.hauer@pengutronix.de>2013-07-02 08:36:09 +0200
commitacc791fb107845f0a6e44ae2e1df392963950243 (patch)
tree50d005e25ba1c2fe2d4818c9912e86fa433ea4ab /arch/arm/mach-tegra/tegra_avp_init.c
parent10a06ed554cc6599b862e49885d731a6cee69b8d (diff)
downloadbarebox-acc791fb107845f0a6e44ae2e1df392963950243.tar.gz
barebox-acc791fb107845f0a6e44ae2e1df392963950243.tar.xz
tegra: deduplicate clk defines
Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra/tegra_avp_init.c')
-rw-r--r--arch/arm/mach-tegra/tegra_avp_init.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c
index 4823733418..5099e913a9 100644
--- a/arch/arm/mach-tegra/tegra_avp_init.c
+++ b/arch/arm/mach-tegra/tegra_avp_init.c
@@ -54,14 +54,14 @@ static void assert_maincomplex_reset(int num_cores)
mask |= 0x1111 << i;
writel(mask, TEGRA_CLK_RESET_BASE + CRC_RST_CPU_CMPLX_SET);
- writel(CRC_RST_DEV_L_SET_CPU, TEGRA_CLK_RESET_BASE + CRC_RST_DEV_L_SET);
+ writel(CRC_RST_DEV_L_CPU, TEGRA_CLK_RESET_BASE + CRC_RST_DEV_L_SET);
}
/* release reset state of the first core of the main CPU complex */
static void deassert_cpu0_reset(void)
{
writel(0x1111, TEGRA_CLK_RESET_BASE + CRC_RST_CPU_CMPLX_CLR);
- writel(CRC_RST_DEV_L_CLR_CPU, TEGRA_CLK_RESET_BASE + CRC_RST_DEV_L_CLR);
+ writel(CRC_RST_DEV_L_CPU, TEGRA_CLK_RESET_BASE + CRC_RST_DEV_L_CLR);
}
/* stop all internal and external clocks to the main CPU complex */
@@ -220,7 +220,7 @@ void barebox_arm_reset_vector(void)
deassert_cpu0_reset();
/* assert AVP reset to stop execution here */
- writel(CRC_RST_DEV_L_SET_COP, TEGRA_CLK_RESET_BASE + CRC_RST_DEV_L_SET);
+ writel(CRC_RST_DEV_L_COP, TEGRA_CLK_RESET_BASE + CRC_RST_DEV_L_SET);
unreachable();
}