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author | Lucas Stach <dev@lynxeye.de> | 2013-09-29 21:59:36 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2013-10-02 10:24:05 +0200 |
commit | f93b5f8eb973a62affbaf134f07d367649ed3ae4 (patch) | |
tree | f738ae6877d030c0c38a8f25b9c2a223bb765e32 /arch/arm/mach-tegra/tegra_avp_init.c | |
parent | f3cf0157fb57bdd9f85ce74e95ac5c3fcb19bab9 (diff) | |
download | barebox-f93b5f8eb973a62affbaf134f07d367649ed3ae4.tar.gz barebox-f93b5f8eb973a62affbaf134f07d367649ed3ae4.tar.xz |
tegra: switch to multi image
To keep things clean I removed all support for the old way to build
images. There is now a single tegra_v7 defconfig which builds both
supported Tegra boards as images.
The new image generation also paves the way for integration of the
tegra-cbootimage tool to produce directly flashable images.
Signed-off-by: Lucas Stach <dev@lynxeye.de>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/arm/mach-tegra/tegra_avp_init.c')
-rw-r--r-- | arch/arm/mach-tegra/tegra_avp_init.c | 19 |
1 files changed, 4 insertions, 15 deletions
diff --git a/arch/arm/mach-tegra/tegra_avp_init.c b/arch/arm/mach-tegra/tegra_avp_init.c index 557af666a7..6cabdb3b92 100644 --- a/arch/arm/mach-tegra/tegra_avp_init.c +++ b/arch/arm/mach-tegra/tegra_avp_init.c @@ -24,17 +24,6 @@ #include <mach/tegra20-car.h> #include <mach/tegra20-pmc.h> -static inline void tegra_cpu_lowlevel_setup(void) -{ - uint32_t r; - - /* set the cpu to SVC32 mode */ - __asm__ __volatile__("mrs %0, cpsr":"=r"(r)); - r &= ~0x1f; - r |= 0xd3; - __asm__ __volatile__("msr cpsr, %0" : : "r"(r)); -} - /* instruct the PMIC to enable the CPU power rail */ static void enable_maincomplex_powerrail(void) { @@ -186,13 +175,10 @@ static void maincomplex_powerup(void) writel(reg, TEGRA_PMC_BASE + PMC_REMOVE_CLAMPING_CMD); } } -void barebox_arm_reset_vector(void) +void tegra_avp_reset_vector(uint32_t boarddata) { int num_cores; - /* minimal initialization, OK for both ARMv4 and ARMv7 */ - tegra_cpu_lowlevel_setup(); - /* get the number of cores in the main CPU complex of the current SoC */ num_cores = tegra_get_num_cores(); @@ -205,6 +191,9 @@ void barebox_arm_reset_vector(void) writel(tegra_maincomplex_entry - get_runtime_offset(), TEGRA_EXCEPTION_VECTORS_BASE + 0x100); + /* put boarddata in scratch reg, for main CPU to fetch after startup */ + writel(boarddata, TEGRA_PMC_BASE + PMC_SCRATCH(10)); + /* bring up main CPU complex */ start_cpu0_clocks(); maincomplex_powerup(); |