summaryrefslogtreecommitdiffstats
path: root/arch/mips/boards
diff options
context:
space:
mode:
authorOleksij Rempel <linux@rempel-privat.de>2018-02-09 11:14:44 +0100
committerSascha Hauer <s.hauer@pengutronix.de>2018-02-13 08:58:18 +0100
commitca4cd04c8e874a8425bf3114f6cf9f78216a8a35 (patch)
tree322b888f7c90a8c9fa2d05c5e9c3540931411faf /arch/mips/boards
parentffee6f29be984ce653945b706364b7433d00d195 (diff)
downloadbarebox-ca4cd04c8e874a8425bf3114f6cf9f78216a8a35.tar.gz
barebox-ca4cd04c8e874a8425bf3114f6cf9f78216a8a35.tar.xz
MIPS: add initial 8devices-lima board
More information about this board can be found here: https://www.8devices.com/products/lima Signed-off-by: Oleksij Rempel <linux@rempel-privat.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips/boards')
-rw-r--r--arch/mips/boards/8devices-lima/include/board/board_pbl_start.h65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/mips/boards/8devices-lima/include/board/board_pbl_start.h b/arch/mips/boards/8devices-lima/include/board/board_pbl_start.h
new file mode 100644
index 0000000000..e95aa49256
--- /dev/null
+++ b/arch/mips/boards/8devices-lima/include/board/board_pbl_start.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (C) 2018 Oleksij Rempel <linux@rempel-privat.de>
+ *
+ * This file is part of barebox.
+ * See file CREDITS for list of people who contributed to this project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ */
+
+#include <mach/debug_ll_ar9344.h>
+#include <asm/pbl_macros.h>
+#include <mach/pbl_macros.h>
+#include <mach/pbl_ll_init_qca4531.h>
+#include <asm/pbl_nmon.h>
+
+ .macro board_pbl_start
+ .set push
+ .set noreorder
+
+ mips_barebox_10h
+
+ debug_ll_ar9344_init
+
+ debug_ll_outc '1'
+
+ hornet_mips24k_cp0_setup
+ debug_ll_outc '2'
+
+ /* test if we are in the SRAM */
+ pbl_blt 0xbd000000 1f t8
+ debug_ll_outc '3'
+ b skip_flash_test
+ nop
+1:
+ /* test if we are in the flash */
+ pbl_blt 0xbf000000 skip_pll_ram_config t8
+ debug_ll_outc '4'
+skip_flash_test:
+
+ pbl_qca4531_ddr2_550_550_init
+
+ debug_ll_outc '5'
+ /* Initialize caches... */
+ mips_cache_reset
+
+ /* ... and enable them */
+ dcache_enable
+skip_pll_ram_config:
+ debug_ll_outc '6'
+ debug_ll_outnl
+
+ mips_nmon
+
+ copy_to_link_location pbl_start
+
+ .set pop
+ .endm