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author | Antony Pavlov <antonynpavlov@gmail.com> | 2014-10-10 00:08:56 +0400 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-10-10 08:37:31 +0200 |
commit | 4764384549a747a8ed70037c6fed5b32f61c7e41 (patch) | |
tree | 3b27c5e0122a0c3df0809149741957d9ca3c44c3 /arch/mips/include | |
parent | 11632790dae23afa0557b1b70eac65931950b674 (diff) | |
download | barebox-4764384549a747a8ed70037c6fed5b32f61c7e41.tar.gz barebox-4764384549a747a8ed70037c6fed5b32f61c7e41.tar.xz |
mips: qemu-malta: add little-endian mode support
We can't just enable SYS_SUPPORTS_LITTLE_ENDIAN for successful
little-endian qemu-malta barebox build. Some byte swapping-related
macros are missed, e.g.:
arch/mips/mach-malta/pci.c: In function 'pcibios_init':
arch/mips/mach-malta/pci.c:218:28: error: 'GT_PCI0_CMD_MBYTESWAP_BIT'
undeclared (first use in this function)
GT_WRITE(GT_PCI0_CMD_OFS, GT_PCI0_CMD_MBYTESWAP_BIT |
^
This patch adds necessary macros definition.
Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips/include')
-rw-r--r-- | arch/mips/include/asm/gt64120.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/arch/mips/include/asm/gt64120.h b/arch/mips/include/asm/gt64120.h index 7e783c8111..88fa1fa5f0 100644 --- a/arch/mips/include/asm/gt64120.h +++ b/arch/mips/include/asm/gt64120.h @@ -76,6 +76,13 @@ #define GT_PCI0_CFGADDR_CONFIGEN_MSK (MSK(1) << GT_PCI0_CFGADDR_CONFIGEN_SHF) #define GT_PCI0_CFGADDR_CONFIGEN_BIT GT_PCI0_CFGADDR_CONFIGEN_MSK +#define GT_PCI0_CMD_MBYTESWAP_SHF 0 +#define GT_PCI0_CMD_MBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_MBYTESWAP_SHF) +#define GT_PCI0_CMD_MBYTESWAP_BIT GT_PCI0_CMD_MBYTESWAP_MSK +#define GT_PCI0_CMD_SBYTESWAP_SHF 16 +#define GT_PCI0_CMD_SBYTESWAP_MSK (MSK(1) << GT_PCI0_CMD_SBYTESWAP_SHF) +#define GT_PCI0_CMD_SBYTESWAP_BIT GT_PCI0_CMD_SBYTESWAP_MSK + /* * Because of an error/peculiarity in the Galileo chip, we need to swap the * bytes when running bigendian. We also provide non-swapping versions. |