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authorDu Huanpeng <duhuanpeng@loongson.cn>2019-11-26 20:27:56 +0800
committerSascha Hauer <s.hauer@pengutronix.de>2020-01-06 10:42:09 +0100
commit0d0d89d5b8dd0590b5a523dfae8aac2c703eb815 (patch)
tree6047e1851dba5079eb4646da5c0b081c330e1c13 /arch/mips/lib/cpu-probe.c
parent7caa298e4dc5af198b32fe10d37864a098008110 (diff)
downloadbarebox-0d0d89d5b8dd0590b5a523dfae8aac2c703eb815.tar.gz
barebox-0d0d89d5b8dd0590b5a523dfae8aac2c703eb815.tar.xz
MIPS: loongson: rename CPU_LOONGSON1 to CPU_GS232
The CPU in the loongson 1b SoC is called GS232. Here is some active chips and it's core: NAME CPU Core(s) The loongson 3 series/server & desktop 3A3000/3B3000 GS464E 64bit x4 3A2000/3B2000 GS464E 64bit x4 3B1500 GS464 64bit x8 3A1000 GS464 64bit x4 The loongson 2 series/low power 2K1000 GS264 64bit x2 2F GS464 64bit x1 2H GS464 64bit x1 The loongson 1 series/embeded 1C101 GS132R 32bit ? 1D GS132 32bit ? 1C GS232 32bit x1 1B GS232 32bit x1 1A GS232 32bit x1 see: [1] http://www.loongson.cn/product/ Signed-off-by: Du Huanpeng <duhuanpeng@loongson.cn> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat (limited to 'arch/mips/lib/cpu-probe.c')
-rw-r--r--arch/mips/lib/cpu-probe.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/mips/lib/cpu-probe.c b/arch/mips/lib/cpu-probe.c
index ddabddd466..cbde43a595 100644
--- a/arch/mips/lib/cpu-probe.c
+++ b/arch/mips/lib/cpu-probe.c
@@ -83,10 +83,10 @@ static void decode_configs(struct cpuinfo_mips *c)
static inline void cpu_probe_legacy(struct cpuinfo_mips *c)
{
switch (c->processor_id & PRID_IMP_MASK) {
- case PRID_IMP_LOONGSON1:
+ case PRID_IMP_GS232:
decode_configs(c);
- c->cputype = CPU_LOONGSON1;
+ c->cputype = CPU_GS232;
switch (c->processor_id & PRID_REV_MASK) {
case PRID_REV_LOONGSON1B: