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author | Sascha Hauer <s.hauer@pengutronix.de> | 2014-08-07 06:15:23 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2014-08-07 13:13:31 +0200 |
commit | 38c3b2455edea648f38d3e11baf478488fd698ed (patch) | |
tree | a66280a235dfd3fdb5c0411f4efc64b2b98aec0c /arch/mips/mach-xburst/include | |
parent | 5b7b7ee5d943c6b58d9b7f974167d0105ca1b787 (diff) | |
parent | ca22ccd7cdbb6b2bd720dd7e14280ee1efa29074 (diff) | |
download | barebox-38c3b2455edea648f38d3e11baf478488fd698ed.tar.gz barebox-38c3b2455edea648f38d3e11baf478488fd698ed.tar.xz |
Merge branch 'for-next/misc'
Conflicts:
lib/Makefile
Diffstat (limited to 'arch/mips/mach-xburst/include')
-rw-r--r-- | arch/mips/mach-xburst/include/mach/jz4750d_regs.h | 22 |
1 files changed, 0 insertions, 22 deletions
diff --git a/arch/mips/mach-xburst/include/mach/jz4750d_regs.h b/arch/mips/mach-xburst/include/mach/jz4750d_regs.h index 7a3daadb18..396c823a1f 100644 --- a/arch/mips/mach-xburst/include/mach/jz4750d_regs.h +++ b/arch/mips/mach-xburst/include/mach/jz4750d_regs.h @@ -59,28 +59,6 @@ #define TCU_OSTCSR_PCK_EN (1 << 0) /* select pclk as the timer clock input */ /************************************************************************* - * WDT (WatchDog Timer) - *************************************************************************/ -#define WDT_TDR (WDT_BASE + 0x00) -#define WDT_TCER (WDT_BASE + 0x04) -#define WDT_TCNT (WDT_BASE + 0x08) -#define WDT_TCSR (WDT_BASE + 0x0c) - -#define WDT_TCSR_PRESCALE_BIT 3 -#define WDT_TCSR_PRESCALE_MASK (0x7 << WDT_TCSR_PRESCALE_BIT) - #define WDT_TCSR_PRESCALE1 (0x0 << WDT_TCSR_PRESCALE_BIT) - #define WDT_TCSR_PRESCALE4 (0x1 << WDT_TCSR_PRESCALE_BIT) - #define WDT_TCSR_PRESCALE16 (0x2 << WDT_TCSR_PRESCALE_BIT) - #define WDT_TCSR_PRESCALE64 (0x3 << WDT_TCSR_PRESCALE_BIT) - #define WDT_TCSR_PRESCALE256 (0x4 << WDT_TCSR_PRESCALE_BIT) - #define WDT_TCSR_PRESCALE1024 (0x5 << WDT_TCSR_PRESCALE_BIT) -#define WDT_TCSR_EXT_EN (1 << 2) -#define WDT_TCSR_RTC_EN (1 << 1) -#define WDT_TCSR_PCK_EN (1 << 0) - -#define WDT_TCER_TCEN (1 << 0) - -/************************************************************************* * RTC *************************************************************************/ #define RTC_RCR (RTC_BASE + 0x00) /* RTC Control Register */ |